AT88SA10HS-TH-T Atmel, AT88SA10HS-TH-T Datasheet - Page 13

• Manufacturer Part Number: AT88SA10HS-TH-T
• Manufacturer: Atmel

Specifications of AT88SA10HS-TH-T

• Lead Free Status / RoHS Status: Supplier Unconfirmed

5.2.
8595F–SMEM–8/10
The 512-bit message block that will be hashed with the SHA-256 algorithm will consist of:
If the overwrite parameter is 0, then the 512-bit message block that will be hashed using the SHA-256 algorithm
will consist of:
If the overwrite parameter has a value of 0x01, then the 512-bit message block that will be hashed using the SHA-
256 algorithm will consist of:
All other values of the overwrite parameter are not recommended for use.
HOST1
Completes the two block SHA-256 digest started by HOST0 and leaves the resulting digest within the internal
memory of the Atmel
previously within this Wake cycle.
As a security precaution, this command does not return the digest. A subsequent command is required to
compare the response generated by the client with the one generated by the host.
Table 5-3.
Table 5-4.
Opcode
Param1
Param2
Data
Name
Success
256-bits
256-bits
256-bits
256-bits
192-bits
256-bits
64-bits
Input Parameters
Output Parameters
Name
HOST1
Mode
Zero
OtherInfo
Size
key[KeyID]
challenge
key[KeyID]
challenge
key[KeyID]
Fuse[0-63]
challenge
1
®
AT88SA10HS. This command returns an error if HOST0 has not been successfully run
Notes
Upon successful completion of HOST1, a value of 0 will be returned by Atmel AT88SA10HS
Atmel AT88SA10HS Host Authentication Chip
Size
13
1
1
2
Notes
0x40
Controls composition of message, see below for details
Must be 0x00 00
Input portion of message to be digested
13