MT45W8MW16BGX-856 AT Micron Technology Inc, MT45W8MW16BGX-856 AT Datasheet - Page 61

MT45W8MW16BGX-856 AT

Manufacturer Part Number
MT45W8MW16BGX-856 AT
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT45W8MW16BGX-856 AT

Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
Figure 49:
PDF: 09005aef80ec6f79/Source: 09005aef80ec6f65
128mb_burst_cr1_5_p26z__2.fm - Rev. H 9/07 EN
2nd Cycle WRITE
2nd Cycle WRITE
2nd Cycle WRITE
DQ[15:0] IN
LB#/UB#
A[22:0]
ADV#
WAIT
WE#
OE#
CLK
CE#
Burst WRITE Interrupted by Burst WRITE or READ – Fixed Latency Mode
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
OH
OL
IH
IL
IH
IL
IH
IL
Notes:
High-Z
2nd Cycle READ
2nd Cycle READ
2nd Cycle READ
DQ[15:0] OUT
t CSP
t SP
t SP
t SP
Address
1. Non-default BCR settings for burst WRITE interrupted by burst WRITE or READ in fixed
2. Burst interrupt shown on first allowable clock (i.e., after first data word written).
3. CE# can stay LOW between burst operations, but CE# must not remain LOW longer than
Valid
LB#/UB#
t HD
t HD
High-Z
latency mode: Fixed latency; latency code two (three clocks); WAIT active LOW; WAIT
asserted during delay.
t
t AVH
CEM.
OE#
V
V
V
V
V
V
128Mb: 8 Meg x 16 Async/Page/Burst CellularRAM 1.5 Async/
IH
IL
IH
IL
OH
OL
t SP
t CLK
t SP
t SP t HD
D0
t CEW
t HD
t SP
t SP
t SP t HD
Address
Valid
61
t HD
t KHTL
WRITE Burst interrupted with new WRITE or READ. See Note 2.
t AVH
V
V
OH
OL
Micron Technology, Inc., reserves the right to change products or specifications without notice.
High-Z
t CEM (
Page/Burst CellularRAM 1.5 Memory
t BOE
t ACLK
Note 3
t SP
)
Output
Valid
D0
t KOH
t HD
Output
D1
Valid
Don’t Care
©2004 Micron Technology, Inc. All rights reserved.
D2
Output
Valid
D3
Output
Valid
t HD
t HD
t OHZ
Undefined
High-Z

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