SLFDM40LPH-1GBJ STEC, SLFDM40LPH-1GBJ Datasheet - Page 15

• Manufacturer Part Number: SLFDM40LPH-1GBJ
• Manufacturer: STEC
• Type: Flash Disk Moduler

Specifications of SLFDM40LPH-1GBJ

• Density: 1GByte
• Operating Supply Voltage (typ): 5V
• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Package Type: Not Required
• Mounting: Screw
• Pin Count: 40
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (min): 4.75V
• Operating Supply Voltage (max): 5.25V
• Programmable: Yes
• Lead Free Status / RoHS Status: Not Compliant

SLFDM(40/44)(LP)(V/H)-xxxJ(I)
Status Register
This read only register indicates status of a command
execution. When the BSY bit is “0”, the other bits are valid;
when the BSY bit is “1”, the other bits are not valid. When
the register is read, the interrupt (-IREQ pin) is cleared.
Alternate Status Register
This register is the same as the Status register except that
-IREQ is not negated when data is read.
Command Register
This write only register is used for writing the command that
executes the drive’s operation. The command code is written
in the command register after its parameters are written in
the Task File during the drive ready state. See details under
the ATA COMMAND SPECIFICATIONS.
bit Name
7
6
5
4
3
2
1
0
bit7
BSY
BSY (BuSY)
DRDY (Drive ReaDY)
DWF (Drive Write Fault)
DSC (Drive Seek Complete)
DRQ (Data ReQuest)
CORR (CORRected data)
IDX (InDeX)
ERR (ERRor)
DRDY
bit6
DWF
bit5
bit4
DSC
Function
This bit is set when the drive internal operation is executing. When this bit is
set to “1”, other bits in this register are invalid.
If this bit and DSC bit are set to “1”, the drive is capable of receiving the read
and write or seek requests. If this bit is set to “0”, the drive prohibits these
requests. On error, DRDY changes only after the host reads the Status Register.
This bit is set if the fault occurs during the write process.
This bit is set when the requested sector was found.
This bit is set when information can be transferred between the host and data
register.
This bit is set when a correctable data error has occurred and the data has been
corrected.
This bit is always set to “0”.
This bit is set when the previous command has ended in some type of error.
The error information is set in the Error register.
DRQ
bit3
CORR
bit2
Document Part Number 61000-02832-113 March 2005
bit1
IDX
FLASH DISK MODULE
bit0
ERR
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