MD2202-D32-X-P SanDisk, MD2202-D32-X-P Datasheet - Page 20

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MD2202-D32-X-P

Manufacturer Part Number
MD2202-D32-X-P
Description
Manufacturer
SanDisk
Datasheet

Specifications of MD2202-D32-X-P

Lead Free Status / RoHS Status
Compliant
Notes: 1. The 0.1 µF and the 10 nF low-inductance high-frequency capacitors must be attached to
7.3
DiskOnChip 2000 uses standard SRAM-like control signals, which should be connected as follows:
7.4
The following section describes hardware design issues.
7.4.1
Wait states can be implemented only when DiskOnChip 2000 is designed in a bus that supports a
Wait state insertion, and supplies a WAIT signal.
7.4.2
PowerPC, ARM, and other RISC processors can use either Big or Little Endian systems.
DiskOnChip 2000 uses the Little Endian system. Therefore, byte D[7:0] is its Least Significant Byte
(LSB); bit D0 is the least significant bit within that byte. When connecting DiskOnChip 2000 to a
20
Address (A[12:0]) – Connect these signals to the host address bus.
Data (D[7:0]) – Connect these signals to the host data bus.
Write (WE#) and Output Enable (OE#) – Connect these signals to the host WR# and RD#
signals, respectively.
Chip Enable (CE#) – Connect this signal to the memory address decoder.
2. DiskOnChip 2000 is an edge-sensitive device. CE#, OE# and WE# should be
Connecting Signals
Platform-Specific Issues
Wait State
Big and Little Endian Systems
each of the device’s VCC and VSS pins.
properly terminated (according to board layout, serial parallel, or both terminations)
to avoid signal ringing.
Output Enable
Write Enable
Chip Enable
Address
Data
Figure 7: DiskOnChip 2000 System Interface
A[12:0]
OE#
CE#
WE#
D[7:0]
Data Sheet, Rev. 3.9
DiskOnChip 2000
0.1 uF
VSS
10 nF
VCC
3.3V or 5V
DiskOnChip 2000 DIP
91-SR-002-42-8L

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