M45PE40-VMP6G Micron Technology Inc, M45PE40-VMP6G Datasheet - Page 39

• Manufacturer Part Number: M45PE40-VMP6G
• Manufacturer: Micron Technology Inc

Specifications of M45PE40-VMP6G

• Cell Type: NOR
• Density: 4Mb
• Access Time (max): 8ns
• Interface Type: Serial (SPI)
• Boot Type: Not Required
• Address Bus: 1b
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Package Type: VFQFPN EP
• Program/erase Volt (typ): 2.7 to 3.6V
• Sync/async: Synchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8b
• Number Of Words: 512K
• Supply Current: 8mA
• Mounting: Surface Mount
• Pin Count: 8
• Lead Free Status / RoHS Status: Compliant

M45PE40
Table 14.
1. Preliminary data.
2. Delivery of parts in T9HX process started from July 2007.
3. t
4. Value guaranteed by characterization, not 100% tested in production.
5. n = number of bytes to program. int(A) corresponds to the upper integer part of A. Examples: int(1/8) = 1, int(16/8) = 2,
Symbol
t
t
SHQZ
t
RLRH
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
RDP
t
t
t
WHSL
SHWL
DVCH
CHDX
CHSH
SHCH
CLQV
CLQX
SHRH
PW
CH
SLCH
CHSL
SHSL
DP
RHSL
CL
PP
int(17/8) = 3.
t
t
CH
f
f
PE
SE
C
R
(3)
(3)
(4)
(5)
(5)
(4)
(4)
+ t
(4)
CL
must be greater than or equal to 1/ f
t
t
t
t
t
t
t
t
t
CSS
DSU
t
CSH
REC
Alt
CLH
RST
CLL
DIS
HO
f
DH
t
C
AC characteristics (50 MHz operation)
V
Clock frequency for the following instructions:
FAST_READ, PW, PP, PE, SE, DP, RDP,
WREN, WRDI, RDSR, RDID
Clock frequency for read instructions
Clock High time
Clock Low time
Clock slew rate
S active setup time (relative to C)
S not active hold time (relative to C)
Data in setup time
Data in hold time
S active hold time (relative to C)
S not active setup time (relative to C)
S deselect time
Output disable time
Clock Low to Output Valid
Output hold time
Write protect setup time
Write protect hold time
S to deep power-down
S High to standby mode
Reset pulse width
Reset recovery time
Chip should have been deselected before
Reset is de-asserted
Page write cycle time (256 bytes)
Page program cycle time (256 bytes)
Page program cycle time (n bytes)
Page erase cycle time
Sector erase cycle time
50 MHz preliminary data for T9HX technology
Test conditions specified in
(4)
Parameter
(peak to peak)
C
.
(1)
Table 8
D.C.
D.C.
Min
100
100
0.1
50
9
9
5
5
2
5
5
5
0
and
Table 9
int(n/8) × 0.025
(2)
Typ
0.8
11
10
1
DC and AC parameters
Max
50
33
30
10
10
23
20
8
8
3
3
3
5
MHz
MHz
V/ns
Unit
39/49
ms
ms
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
µs
µs
µs
ns
s