PF38F6070M0Y0BE Micron Technology Inc, PF38F6070M0Y0BE Datasheet - Page 53

no-image

PF38F6070M0Y0BE

Manufacturer Part Number
PF38F6070M0Y0BE
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of PF38F6070M0Y0BE

Operating Temperature (max)
85C
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
Numonyx™ Wireless Flash Memory (W18)
Table 23: Bus Cycle Definitions
9.3
November 2007
Order Number: 290701-18
Notes:
1.
2.
3.
Configuration
Protection
Operation
First-cycle command addresses should be the same as the operation’s target address. Examples: the first-cycle address
for the Read Identifier command should be the same as the Identification code address (IA); the first-cycle address for
the Word Program command should be the same as the word address (WA) to be programmed; the first-cycle address
for the Erase/Program Suspend command should be the same as the address within the block to be suspended; etc.
XX = Any valid address within the device.
IA = Identification code address.
BA = Block Address. Any address within a specific block.
LPA = Lock Protection Address is obtained from the CFI (through the CFI Query command). The
Flash Memory (W18)
PA = User programmable 4-word protection address.
PnA = Any address within a specific partition.
PBA = Partition Base Address. The very first address of a particular partition.
QA = CFI code address.
WA = Word address of memory location to be written.
SRD = Status register data.
WD = Data to be written at location WA.
IC = Identifier code data.
PD = User programmable 4-word protection data.
QD = Query code data on DQ[7:0].
CD = Configuration register code data presented on device addresses A[15:0]. A[MAX:16] address bits can select any
partition. See
Register bits descriptions.
Commands other than those shown above are reserved by Numonyx for future device implementations and should not
be used.
Command Sequencing
When issuing a 2-cycle write sequence to the flash device, a read operation is allowed
to occur between the two write cycles. The setup phase of a 2-cycle write sequence
places the addressed partition into read-status mode, so if the same partition is read
before the second “confirm” write cycle is issued, Status Register data will be returned.
Reads from other partitions, however, can return actual array data assuming the
addressed partition is already in read-array mode.
these two conditions.
Protection Program
Lock Protection Program
Set Configuration Register
Table 31, “Read Configuration Register Descriptions” on page 78
Command
family’s LPA is at 0080h.
Cycles
Bus
2
2
2
Oper
Write
Write
Write
First Bus Cycle
Addr
LPA
CD
PA
1
Figure 23
Data
C0h
C0h
60h
2,3
and
Oper
Write
Write
Write
Figure 24
Second Bus Cycle
Numonyx Wireless
for Configuration
Addr
LPA
CD
PA
1
illustrate
Datasheet
Data
FFFDh
03h
PD
2,3
53

Related parts for PF38F6070M0Y0BE