PF38F1030W0YCQEA Micron Technology Inc, PF38F1030W0YCQEA Datasheet - Page 64
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PF38F1030W0YCQEA
Manufacturer Part Number
PF38F1030W0YCQEA
Description
Manufacturer
Micron Technology Inc
Datasheet
1.PF38F1030W0YCQEA.pdf
(102 pages)
Specifications of PF38F1030W0YCQEA
Operating Supply Voltage (max)
1.95V
Operating Temperature (max)
85C
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
Figure 27: Enhanced Factory Program Flowchart
Datasheet
64
1. WA
2. For proper verification to occur , the verify data stream must be presented to the device in the
3. Bits that did not fully program with the single WSM pulse of the EFP program phase receive
Standby
Standby
Standby
State
Read
Write
Write
Write
Bus
Address) must remain constant throughout the program phase data stream; WA can be held
constant at the first address location, or it can be written to sequence up through the addresses
within the block. Writing to a BBA not equal to that of the block currently being written to
terminates the EFP program phase, and instructs the device to enter the EFP verify phase.
same sequence as that of the program phase data stream. Writing to a BBA not equal to WA
terminates the EFP verify phase, and instructs the device to exit EFP .
additional program-pulse attempts during the EFP verify phase. The device will report any
program failure by setting SR[4]=1; this check can be performed during the full status check after
EFP has been exited for that block, and will indicate any error within the entire data stream.
Check V
errors (SR[3,1])
EFP Setup
Address = WA
Address = WA
EFP setup time
Status Register
Unlock Block
0
SR[7]=1=N
EFP Setup
V
Write D0h
= first Word Address to be programmed within the target block. The BBA (Block Base
Write 30h
PP
Done?
Condition
Read
Start
Confirm
Exit
Unlock
Done?
Check
Setup
Setup
= 12V
Block
Error
PP
EFP
EFP
EFP
& Lock
EFP Setup
0
0
V
Unlock block
Data = 30h
Address = WA
Data = D0h
Address = WA
EFP setup time
Status Register
Check SR[7]
0 = EFP ready
1 = EFP not ready
If SR[7] = 1:
SR[3] = 1 = V
SR[1] = 1 = locked block
PP
Check SR[3,1]
= 12V
Comments
SR[0]=1=N
PP
0
0
error
N
EFP Program
Status Register
Status Register
Address = WA
Address ≠ BBA
Data Stream
Write FFFFh
SR[0] =0=Y
SR[0]=0=Y
Write Data
Program
Ready?
Done?
Data?
Read
Read
Standby
Standby
Standby
Last
(note 1)
State
Read
Write
Read
Write
Bus
Y
0
Program
Program
Ready?
Stream
Done?
Data?
Phase
Data
Last
Exit
EFP Program
Status Register
Check SR[0]
0 = Ready for data
1 = Not ready for data
Data = Data to program
Address = WA
Status Register
Check SR[0]
0 = Program done
1 = Program not done
Device automatically
increments address.
Data = FFFFh
Address not within same
BBA
SR[0]=1=N
Comments
N
0
Status Register
Status Register
EFP Verify
Address = WA
Address ≠ BBA
Verify Stream
Write FFFFh
SR[0] =0=Y
Write Data
SR[0]=0=Y
Ready?
Done?
Verify
Data?
Read
Read
Last
Y
Numonyx™ Wireless Flash Memory (W18)
Numonyx™ Wireless Flash Memory (W18)
0
Repeat for subsequent operations.
After EFP exit, a Full Status Check can
determine if any program error occurred.
See the Full Status Check procedure in the
Word Program flowchart.
Standby
Standby
Standby
Standby
(note 2)
(note 3)
State
Read
Write
Read
Write
Read
Bus
Ready?
Exited?
Stream
Done?
Phase
Verify
Verify
Data?
Verify
Last
EFP
Exit
SR[7]=0=N
EFP Verify
EFP Exit
Order Number: 290701-18
Status Register
Check SR[0]
0 = Ready for verify
1 = Not ready for verify
Data = Word to verify
Address = WA
Status Register
Check SR[0]
0 = Verify done
1 = Verify not done
Device automatically
increments address.
Data = FFFFh
Address not within same
BBA
Status Register
Check SR[7]
0 = Exit not finished
1 = Exit completed
Full Status Check
Status Register
EFP Exit
Comments
SR[7]=1=Y
Procedure
Operation
Complete
Exited?
Read
EFP
November 2007
0