PF38F5050M0Y0CE Micron Technology Inc, PF38F5050M0Y0CE Datasheet - Page 32

• Manufacturer Part Number: PF38F5050M0Y0CE
• Manufacturer: Micron Technology Inc

Specifications of PF38F5050M0Y0CE

• Operating Temperature (max): 85C
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

Figure 9:
Notes:
1.
2.
3.
Datasheet
32
Section 14.2, “First Access Latency Count (RCR[13:11])” on page 79
cycles during the initial access.
WAIT (shown asserted; RCR[10]=0) can be configured to assert either during, or one data cycle before, valid data.
This waveform illustrates the case in which an x-word burst is initiated to the main array and it is terminated by a CE# de-
assertion after the first word in the burst. If this access had been done to Status, ID, or Query reads, the asserted (low)
WAIT signal would have remained asserted (low) as long as CE# is asserted (low).
Single Synchronous Read-Array Operation Waveform
R12
Numonyx™ Wireless Flash Memory (W18)
Numonyx™ Wireless Flash Memory (W18)
R13
describes how to insert clock
Order Number: 290701-18
November 2007