AT52BR1664-90CI Atmel, AT52BR1664-90CI Datasheet - Page 7

• Manufacturer Part Number: AT52BR1664-90CI
• Manufacturer: Atmel

Specifications of AT52BR1664-90CI

• Operating Supply Voltage (max): 3.3V
• Operating Temperature (max): 85C
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

2212C–STKD–09/02
changed. Voltages applied to the RESET pin will not alter the value of the configuration regis-
ter. The value of the configuration register will affect the operation of the I/O7 status bit as
described below.
DATA POLLING: The 16-megabit features Data Polling to indicate the end of a program cycle.
If the status configuration register is set to a “00”, during a program cycle an attempted read of
the last word loaded will result in the complement of the loaded data on I/O7. Once the pro-
gram cycle has been completed, true data is valid on all outputs and the next cycle may begin.
During a chip or sector erase operation, an attempt to read the device will give a “0” on I/O7.
Once the program or erase cycle has completed, true data will be read from the device. Data
Polling may begin at any time during the program cycle. Please see “Status Bit Table” on page
12 for more details.
If the status bit configuration register is set to a “01”, the I/O7 status bit will be low while the
device is actively programming or erasing data. I/O7 will go high when the device has com-
pleted a program or erase operation. Once I/O7 has gone high, status information on the other
pins can be checked.
The Data Polling status bit must be used in conjunction with the erase/program and V
bit as shown in the algorithm in Figures 1 and 2 on page 10.
TOGGLE BIT: In addition to Data Polling, the 16-megabit Flash provides another method for
determining the end of a program or erase cycle. During a program or erase operation, suc-
cessive attempts to read data from the memory will result in I/O6 toggling between one and
zero. Once the program cycle has completed, I/O6 will stop toggling and valid data will be
read. Examining the toggle bit may begin at any time during a program cycle. Please see “Sta-
tus Bit Table” on page 12 for more details.
The toggle bit status bit should be used in conjunction with the erase/program and V
bit as shown in the algorithm in Figures 3 and 4 on page 11.
ERASE/PROGRAM STATUS BIT: The device offers a status bit on I/O5, which indicates
whether the program or erase operation has exceeded a specified internal pulse count limit. If
the status bit is a “1”, the device is unable to verify that an erase or a word program operation
has been successfully performed. The device may also output a “1” on I/O5 if the system tries
to program a “1” to a location that was previously programmed to a “0”. Only an erase opera-
tion can change a “0” back to a “1”. If a program (Sector Erase) command is issued to a
protected sector, the protected sector will not be programmed (erased). The device will go to a
status read mode and the I/O5 status bit will be set high, indicating the program (erase) opera-
tion did not complete as requested. Once the erase/program status bit has been set to a “1”,
the system must write the Product ID Exit command to return to the read mode. The
erase/program status bit is a “0” while the erase or program operation is still in progress.
Please see “Status Bit Table” on page 12 for more details.
V
mation regarding the voltage level of the VPP pin. During a program or erase operation, if the
voltage on the VPP pin is not high enough to perform the desired operation successfully, the
I/O3 status bit will be a “1”. Once the V
write the Product ID Exit command to return to the read mode. On the other hand, if the volt-
age level is high enough to perform a program or erase operation successfully, the V
bit will output a “0”. Please see “Status Bit Table” on page 12 for more details.
SECTOR LOCKDOWN: Each sector has a programming lockdown feature. This feature pre-
vents programming of data in the designated sectors once the feature has been enabled.
These sectors can contain secure code that is used to bring up the system. Enabling the lock-
down feature will allow the boot code to stay in the device while data in the rest of the device is
updated. This feature does not have to be activated; any sector’s usage as a write-protected
region is optional to the user.
PP
STATUS BIT: The 16-megabit Flash provides a status bit on I/O3, which provides infor-
PP
status bit has been set to a “1”, the system must
AT52BR1662(T)/1664(T)
PP
PP
PP
status
status
status
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