MMA8451QR1 Freescale, MMA8451QR1 Datasheet - Page 25

• Manufacturer Part Number: MMA8451QR1
• Manufacturer: Freescale

Specifications of MMA8451QR1

• Lead Free Status / RoHS Status: Compliant

Data Registers: 0x01 OUT_X_MSB, 0x02 OUT_X_LSB, 0x03 OUT_Y_MSB, 0x04 OUT_Y_LSB, 0x05 OUT_Z_MSB, 0x06
OUT_Z_LSB
the FIFO data output register driver is enabled (F_MODE > 00) the sample data output registers point to the head of the FIFO
buffer (Register 0x01 X_MSB) which contains the previous 32 X, Y, and Z data samples. Data Registers F_MODE = 00
incrementing address range of 0x01 to 0x06 to reduce reading the status followed by 14-bit axis data to 7 bytes. If the F_READ
bit is set (0x2A bit 1), auto increment will skip over LSB registers. This will shorten the data acquisition from
7 bytes to 4 bytes. The LSB registers can only be read immediately following the read access of the corresponding MSB register.
A random read access to the LSB registers is not possible. Reading the MSB register and then the LSB register in sequence
ensures that both bytes (LSB and MSB) belong to the same data sample, even if a new data sample arrives between reading the
MSB and the LSB byte.
0x06 return a value of zero when read. If the F_READ bit is set (0x2A bit 1), auto increment will skip over LSB registers to access
the MSB data only.
6.2
F_MODE > 0 0x00: F_STATUS FIFO Status Register
This register has a flag for the overflow and watermark. It also has a counter that can be read to obtain the number of samples
stored in the buffer when the FIFO is enabled.
0x01 OUT_X_MSB: X_MSB Register (Read Only)
0x02 OUT_X_LSB: X_LSB Register (Read Only)
0x05 OUT_Z_MSB: Z_MSB Register (Read Only)
24
0x06 OUT_Z_LSB: Z_LSB Register (Read Only)
MMA8451Q
0x03 OUT_Y_MSB: Y_MSB Register (Read Only)
0x04 OUT_Y_LSB: Y_LSB Register (Read Only)
0x00 F_STATUS: FIFO STATUS Register (Read Only)
These registers contain the X-axis, Y-axis, and Z-axis14-bit output sample data expressed as 2's complement numbers.
Note: The sample data output registers store the current sample data if the FIFO data output register driver is disabled, but if
OUT_X_MSB, OUT_X_LSB, OUT_Y_MSB, OUT_Y_LSB, OUT_Z_MSB, and OUT_Z_LSB are stored in the auto-
If the FIFO is enabled (F_MODE > 00), Register 0x01 points to the FIFO read pointer, while registers 0x02, 0x03, 0x04, 0x05,
The following registers are used to configure the FIFO. For more information on the FIFO please refer to AN4073.
When F_MODE > 0, Register 0x00 becomes the FIFO Status Register which is used to retrieve information about the FIFO.
F_OVF
XD13
ZD13
Bit 7
YD13
Bit 7
Bit 7
Bit 7
Bit 7
XD5
Bit 7
Bit 7
YD5
ZD5
32 Sample FIFO
F_WMRK_FLAG
XD12
ZD12
Bit 6
YD12
Bit 6
Bit 6
Bit 6
XD4
Bit 6
Bit 6
YD4
ZD4
Bit 6
XD11
YD11
ZD11
Bit 5
Bit 5
Bit 5
Bit 5
Bit 5
XD3
Bit 5
YD3
ZD3
F_CNT5
Bit 5
XD10
YD10
ZD10
Bit 4
Bit 4
Bit 4
Bit 4
Bit 4
Bit 4
XD2
YD2
ZD2
F_CNT4
Bit 4
Bit 3
Bit 3
Bit 3
Bit 3
Bit 3
Bit 3
XD9
XD1
YD9
YD1
ZD9
ZD1
F_CNT3
Bit 3
Bit 2
Bit 2
Bit 2
Bit 2
Bit 2
Bit 2
YD8
YD0
F_CNT2
XD8
XD0
ZD8
ZD0
Bit 2
F_CNT1
Bit 1
Bit 1
Bit 1
Bit 1
Bit 1
YD7
Bit 1
ZD7
XD7
Freescale Semiconductor
Bit 1
0
0
0
F_CNT0
Bit 0
Bit 0
Bit 0
Bit 0
YD6
Bit 0
Bit 0
ZD6
Bit 0
XD6
0
0
0
Sensors