LTC4213IDDB#PBF Linear Technology, LTC4213IDDB#PBF Datasheet - Page 11

• Manufacturer Part Number: LTC4213IDDB#PBF
• Manufacturer: Linear Technology

Specifications of LTC4213IDDB#PBF

• Linear Misc Type: Positive Low Voltage
• Package Type: DFN EP
• Operating Supply Voltage (min): 2.3V
• Operating Supply Voltage (max): 6V
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Product Length (mm): 3mm
• Mounting: Surface Mount
• Pin Count: 8
• Lead Free Status / RoHS Status: Compliant

APPLICATIO S I FOR ATIO
supply transient dips below 1.97V of less than 80µs are
ignored.
ON Function
When V
0.4V for 80µs, the device resets. The system leaves reset
mode if the ON pin rises above comparator COMP2’s
threshold of 0.8V and the UVLO condition is met. Leaving
reset mode, the GATE pin starts up after a t
of 60µs. When ON goes below 0.76V, the GATE shuts off
after a 5µs glitch filter delay. The output is discharged by
the external load when V
this state, the ON pin can re-enable the GATE if V
exceeds 0.8V for more than 8µs. Alternatively, the device
resets if the ON pin is brought below 0.4V for 80µs. Once
reset, the GATE pin restarts only after the t
delay at V
overvoltage stress due to supply transients, a series
resistor of greater than 10k is recommended when the ON
pin is connected directly to the supply. An external resis-
tive divider at the ON pin can be used with COMP2 to set
a supply undervoltage lockout value higher than the inter-
nal UVLO circuit. An RC filter can be implemented at the
ON pin to increase the powerup delay time beyond the
internal 60µs delay.
Gate Function
The GATE pin is held low in reset mode. 60µs after leaving
reset mode, the GATE pin is charged up by an internal
100µA current source. The circuit breaker arms when
V
the GATE peak voltage is internally clamped to ∆V
above the SENSEN pin. When the circuit breaker trips, an
internal MOSFET shorts the GATE pin to GND, turning off
the external MOSFET.
READY Status
The READY pin is held low during reset and at startup. It
is pulled high by an external pullup resistor 50µs after the
circuit breaker arms. The READY pin pulls low if the circuit
breaker trips or the ON pin is pulled below 0.76V, or V
drops below undervoltage lockout.
GATE
> V
ON
ON
SENSEN
is below comparator COMP1’s threshold of
rising above 0.8V. To protect the ON pin from
+ ∆V
U
GSARM
ON
U
is in between 0.4V to 0.8V. At
. In normal mode operation,
W
DEBOUNCE
DEBOUNCE
U
GSMAX
delay
60µs
ON
CC
∆V
Each MOSFET has a recommended V
where the channel is deemed fully enhanced and R
minimized. Driving beyond this recommended V
age yields a marginal decrease in R
gate voltage starts at ground potential. The GATE ramps
past the MOSFET threshold and the load current begins to
flow. When V
armed and enabled. The chosen MOSFET should have a
recommended minimum V
∆V
Trip and Reset Circuit Breaker
Figure 2 shows the timing diagram of V
after a fault condition. A tripped circuit breaker can be reset
either by cycling the V
old or pulling ON below 0.4V for >t
the timing diagram for a tripped circuit breaker being reset
by the ON pin.
Calculating Current Limit
The fault current limit is determined by the R
MOSFET and the circuit breaker voltage V
The R
tion, V
connections between the MOSFET drain and source to
the LTC4213 SENSEP and SENSEN pins are strongly
recommended.
For a selected MOSFET, the nominal load limit current is
given by:
The minimum load limit current is given by:
GSARM
GSARM
I
I
I
LIMIT
LIMIT NOM
LIMIT MIN
DSON
GS
(
(
. Finally, V
=
and V
and junction temperature. Short Kelvin-sense
value depends on the manufacturer’s distribu-
R
)
V
DSON
GS
)
=
CB
=
GSMAX
exceeds ∆V
R
R
DSON MAX
V
V
DSON NOM
CB MIN
GS
CB NOM
CC
(
(
reaches a maximum at ∆V
(
(
bias supply below UVLO thresh-
)
GS
)
)
GSARM
)
drive level that is lower than
RESET
, the circuit breaker is
DSON
LTC4213
GS
GATE
. Figure 3 shows
. At startup, the
CB
drive voltage
.
and V
DSON
GS
11
GSMAX.
DSON
READY
of the
volt-
4213f
( )
( )
( ) 2
3
4
is