AD9852AST Analog Devices Inc, AD9852AST Datasheet - Page 13

• Manufacturer Part Number: AD9852AST
• Manufacturer: Analog Devices Inc

Specifications of AD9852AST

• Lead Free Status / RoHS Status: Not Compliant

Figure 10 to Figure 15 show the trade-off in elevated noise floor, increased phase noise (PN), and discrete spurious energy when the
internal REFCLK multiplier circuit is engaged. Plots with wide (1 MHz) and narrow (50 kHz) spans are shown. Compare the noise floor of
Figure 11 and Figure 12 with that of Figure 14 and Figure 15. The improvement seen in Figure 11 and Figure 12 is a direct result of sampling
the fundamental at a higher rate. Sampling at a higher rate spreads the quantization noise of the DAC over a wider bandwidth, which
effectively lowers the noise floor.
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CENTER 39.1MHz
CENTER 39.1MHz
CENTER 39.1MHz
Figure 11. Narrow-Band SFDR, 39.1 MHz, 50 kHz BW,
Figure 12. Narrow-Band SFDR, 39.1 MHz, 50 kHz BW,
Figure 10. Narrow-Band SFDR, 39.1 MHz, 1 MHz BW,
300 MHz REFCLK with REFCLK Multiplier Bypassed
300 MHz REFCLK with REFCLK Multiplier Bypassed
100 MHz REFCLK with REFCLK Multiplier Bypassed
100kHz/
5kHz/
5kHz/
SPAN 50kHz
SPAN 50kHz
SPAN 1MHz
Rev. E | Page 13 of 52
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CENTER 39.1MHz
CENTER 39.1MHz
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Figure 14. Narrow-Band SFDR, 39.1 MHz, 50 kHz BW,
Figure 15. Narrow-Band SFDR, 39.1 MHz, 50 kHz BW,
Figure 13. Narrow-Band SFDR, 39.1 MHz, 1 MHz BW,
30 MHz REFCLK with REFCLK Multiplier = 10×
30 MHz REFCLK with REFCLK Multiplier = 10×
10 MHz REFCLK with REFCLK Multiplier = 10×
100kHz/
5kHz/
5kHz/
SPAN 50kHz
SPAN 50kHz
SPAN 1MHz
AD9852