L-USS820D-DB LSI, L-USS820D-DB Datasheet - Page 34

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L-USS820D-DB

Manufacturer Part Number
L-USS820D-DB
Description
Manufacturer
LSI
Datasheet

Specifications of L-USS820D-DB

Operating Temperature (min)
-20C
Operating Temperature Classification
Commercial
Operating Temperature (max)
85C
Rad Hardened
No
Lead Free Status / RoHS Status
Compliant
USS-820D
USB Device Controller
USB Device Controller
Register Interface
Table 29. Receive FIFO Flag Register (RXFLG)—Address: 09H; Default: 0000 1000B (continued)
34
Bit
0
Symbol
RXOVF
Receive FIFO Overrun Flag (Read, Clear Only). This bit is set when the SIE writes an
additional byte to a full receive FIFO or writes a byte count to RXCNT with RXFIF[1:0] =
11. This bit must be cleared by firmware through RXCLR, although it can be cleared by
hardware if a SETUP packet is received after an RXOVF error has already occurred.
When this bit is set, all transmissions are NACKed.
In isochronous mode, RXOVF, RXURF, and RXFIF are handled using the following rule:
firmware events cause status change immediately, while USB events cause status
change only at SOF. Since overrrun can only be caused by the USB, RXOVF is updated
only at the next SOF regardless of where the overrun occurred during the current frame.
Note: When this bit is set, the FIFO is in an unknown state. It is recommended that the
(continued)
FIFO is reset in the error management routine using the RXCLR bit in the RXCON
register. When the receive FIFO overruns, the write pointer does not advance. It
remains locked in the full position.
Function/Description
Data Sheet, Rev. 7
September 2004
Agere Systems Inc.

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