5962-8687901EA Holt Integrated Circuits, 5962-8687901EA Datasheet - Page 2

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5962-8687901EA

Manufacturer Part Number
5962-8687901EA
Description
Manufacturer
Holt Integrated Circuits
Datasheet

Specifications of 5962-8687901EA

Operating Temperature Classification
Military
Operating Temperature (max)
125C
Rad Hardened
No
Lead Free Status / RoHS Status
Not Compliant

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FUNCTIONAL DESCRIPTION
The SYNC and CLOCK inputs establish data synchronization
utilizing two AND gates, one for each data input. Each logic
input, including the power enable (
TTL/CMOS compatible. Besides reducing chip current drain,
STROBE
fuses and diodes of the HI-8382 are not switched out.
Figure 1 illustrates a typical ARINC 429 bus application.
Three power supplies are necessary to operate the HI-8382;
typically +15V, -15V and +5V. The chip also works with ±12V
supplies. The +5V supply can also provide a reference
voltage that determines the output voltage swing.
differential output voltage swing will equal 2V
V
is required for pin V .
With the DATA (A) input at a logic high and DATA (B) input at a
logic low, A
switch to the -V
input signals at a logic low state, the outputs will both switch to
0V (ARINC NULL state).
The driver output impedance, R
The rise and fall times of the outputs can be calibrated through
the selection of two external capacitor values th
connected to the C and C input pins. Typical values for
high-speed operation (100KBPS) are C = C = 75pF and for
low-speed operation (12.5 to 14KBPS) C = C = 500pF.
The driver can be externally powered down by applying a logic
high to the
the pin should be tied to ground.
The C
Therefore they must be allowed to swing to -5V. Provision to
REF
other than +5V is needed, a separate +5V power supply
A
DATA (A)
DATA (B)
STROBE
CLOCK
SYNC
and C
also floats each output. However the overvoltage
STROBE
V
OUT
1
REF
B
will switch to the +V
pins are inputs to unity gain amplifiers.
1
rail (ARINC HIGH state). With both data
A
input pin. If this feature is not being used,
REGULATOR
CURRENT
B
OUT
, is nominally 75 ohms.
REF
V
GND
STROBE
A
REF
A
Figure 2. FUNCTIONAL BLOCK DIAGRAM
rail and B
LEVEL SHIFTER
LEVEL SHIFTER
REF
B
CONTROL (A)
CONTROL (B)
B
AND SLOPE
AND SLOPE
+V
-V
. If a value of
) input, are
HOLT INTEGRATED CIRCUITS
OUT
HI-8382, HI-8383
C
C
at a
A
B
The
will
re
Not included on HI-8383
2
switch capacitors must be done with analog switches that
allow voltages below their ground.
Both ARINC outputs of the HI-8382 are protected by internal
fuses capable of sinking between 800 - 900 mA for short
periods of time (125µs).
POWER SUPPLY SEQUENCING
The power supplies should be controlled to prevent large
currents during supply turn-on and turn-off. The recom-
mended sequence is +V followed by V , always ensuring that
+V is the most positive supply. The -V supply is not critical
and can be asserted at any time.
DATA (A)
DATA (B)
INPUTS
Figure 1. ARINC 429 BUS APPLICATION
DRIVER (A)
DRIVER (B)
OUTPUT
OUTPUT
R
R
OUT
OUT
V
/ 2
/ 2
REF
+5V
C
A
V
C
1
B
SYNC
OVER VOLTAGE
GND
STROBE
CLOCK
CLAMPS
F
F
+15V
-15V
A
B
+V
-V
1
TO ARINC BUS
A
B
OUT
OUT
C
L
A
B
OUT
OUT
R
L

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