MC34910G5ACR2 Freescale, MC34910G5ACR2 Datasheet - Page 82
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MC34910G5ACR2
Manufacturer Part Number
MC34910G5ACR2
Description
Manufacturer
Freescale
Datasheet
1.MC34910G5ACR2.pdf
(90 pages)
Specifications of MC34910G5ACR2
Turn Off Delay Time
10us
Number Of Drivers
2
Operating Temperature (min)
-40C
Lead Free Status / RoHS Status
Compliant
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC34910G5ACR2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
High Side Control Register - HSCR
Writing to this register returns the High Side Status Register
(HSSR).
PWMHSx - PWM Input Control Enable
to control the high side switch. The high side switch must be
enabled (HSx bit).
HSx - High Side Switch Control.
High Side Status Register - HSSR
is also returned when writing to the HSCR.
High Side thermal shutdown
setting the HSxOP and HSxCL bits simultaneously.
HSxOP - High Side Switch Open-Load Detection
conducting current below a certain threshold indicating
possible load disconnection.
Analog Integrated Circuit Device Data
Freescale Semiconductor
Table 47. High Side Control Register - $6
Condition
This register controls the operation of the high side drivers.
This write-only bit enables/disables the PWMIN input pin
1 = PWMIN input controls HS1 output.
0 = HSx is controlled only by SPI.
This write-only bit enables/disables the high side switch.
1 = HSx switch on.
0 = HSx switch off.
This register returns the status of the high side switch and
A thermal shutdown of the high side drivers is indicated by
This read-only bit signals that the high side switch is
1 = HSx Open Load detected (or thermal shutdown)
0 = Normal
Reset
Reset
Value
Write
Table 48. High Side Status Register - $6/$7
Read
PWMHS2
C3
0
HS2OP
POR
S3
PWMHS1
C2
0
HS2CL
S2
POR, Reset mode, ext_reset, HSx
over-temp or (VSOV & HVSE)
HS2
HS1OP
C1
0
S1
HS1CL
S0
HS1
C0
0
HSxCL - High Side Current Limitation
operating in current Limitation mode.
Timing Control Register - TIMCR
configure the watchdog and the cyclic sense periods. Writing
to the TIMCR will also return the WDSR.
CS/WD - Cyclic Sense or Watchdog Prescaler Select.
to, the cyclic sense prescaler or the watchdog prescaler.
WDx - Watchdog Prescaler
prescaler and therefore selects the watchdog period in
accordance with
windowing watchdog is active.
Table 50.
WD2
This read-only bit indicates that the high side switch is
1 = HSx in current limitation (or thermal shutdown)
0 = Normal
This register is a double purpose register which allows to
This write-only bit selects which prescaler is being written
1 = Cyclic Sense Prescaler selected
0 = Watchdog Prescaler select
This write-only bits selects the divider for the watchdog
0
0
0
0
1
1
1
1
Table 49. Timing Control Register - $A
Condition
Reset
Value
Reset
Write
Watchdog Prescaler
WD1
0
0
1
1
0
0
1
1
Table
CS/WD
C3
-
-
WD0
0
1
0
1
0
1
0
1
50. This configuration is valid only if
LOGIC COMMANDS AND REGISTERS
FUNCTIONAL DEVICE OPERATIONS
CYST2
WD2
C2
0
Prescaler Divider
CYST1
WD1
POR
C1
0
10
12
14
1
2
4
6
8
CYST0
WD0
C0
0
33910
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