AD9100AE Analog Devices Inc, AD9100AE Datasheet

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AD9100AE

Manufacturer Part Number
AD9100AE
Description
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9100AE

Number Of Sample And Hold Elements
1
Power Supply Requirement
Dual
Single Supply Voltage (typ)
Not RequiredV
Single Supply Voltage (min)
Not RequiredV
Single Supply Voltage (max)
Not RequiredV
Lead Free Status / RoHS Status
Not Compliant

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AD9100AE
Manufacturer:
AD
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a
GENERAL DESCRIPTION
The AD9100 is a monolithic track-and-hold amplifier which
sets a new standard for high speed and high dynamic range
applications. It is fabricated in a mature high speed complemen-
tary bipolar process. In addition to innovative design topologies,
a custom package is utilized to minimize parasitics and optimize
dynamic performance.
Acquisition time (hold to track) is 13 ns to 0.1% accuracy, and
16 ns to 0.01%. The AD9100 boasts superlative hold-mode
frequency domain performance; when sampling at 30 MSPS
hold mode distortion is less than 83 dBfs for analog frequencies
up to 12 MHz; and –74 dBfs at 20 MHz. The AD9100 can also
drive capacitive loads up to 100 pF with little degradation in
acquisition time; it is therefore well suited to drive 8- and 10-bit
flash converters at clock speeds to 50 MSPS. With a spectral
noise density of 3.3 nV/ Hz and feedthrough rejection of 83 dB
at 20 MHz, the AD9100 is well suited to enhance the dynamic
range of many 8- to 16-bit systems.
*Patent pending.
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
FEATURES
Excellent Hold Mode Distortion into 250
16 ns Acquisition Time to 0.01%
<1 ps Aperture Jitter
250 MHz Tracking Bandwidth
83 dB Feedthrough Rejection @ 20 MHz
3.3 nV/ Hz Spectral Noise Density
MlL-STD-Compliant Versions Available
APPLICATIONS
A/D Conversion
Direct IF Sampling
Imaging/FLIR Systems
Peak Detectors
Radar/EW/ECM
Spectrum Analysis
CCD ATE
–88 dB @ 30 MSPS (2.3 MHz V
–83 dB @ 30 MSPS (12.1 MHz V
–74 dB @ 30 MSPS (19.7 MHz V
IN
IN
IN
)
)
)
The AD9100 is “user friendly” and easy to apply: (1) it requires
+5 V/–5.2 V power supplies; (2) the hold capacitor and switch
power supply decoupling capacitors are built into the DIP
package; (3) the encode clock is differential ECL to minimize
clock jitter; (4) the input resistance is typically 800 k ; (5) the
analog input is internally clamped to prevent damage from
voltage transients.
The AD9100 is available in a 20-lead side-brazed “skinny DIP”
package and a 28-lead LCC package. Commercial, industrial,
and military temperature grade parts are available. Consult the
factory for information about the availability of 883-qualified
devices.
PRODUCT HIGHLIGHTS
1. Hold Mode Distortion is guaranteed.
2. Monolithic construction.
3. Analog input is internally clamped to protect against
4. Output is short circuit protected.
5. Drives capacitive loads to 100 pF.
6. Differential ECL clock inputs.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
overvoltage transients and ensure fast recovery.
V
IN
50
Monolithic Track-and-Hold
CLAMP
FUNCTIONAL BLOCK DIAGRAM
2.3V
A1
CLK
SWITCH
CLK
Ultrahigh Speed
C
HOLD
22pF
AD9100
AD9100*
A2
Fax: 617/326-8703
V
OUT

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AD9100AE Summary of contents

Page 1

FEATURES Excellent Hold Mode Distortion into 250 – MSPS (2.3 MHz V – MSPS (12.1 MHz V – MSPS (19.7 MHz Acquisition Time to 0.01% <1 ps ...

Page 2

... OUT MAX = 2 V p-p T OUT MIN = OUT MIN T MAX p-p Full Full Full IN Full –2– = –5 100 ; LOAD IN 3 Test AD9100AE/SE/JD/AD/SD Level Min Typ Max VI 0.989 0.994 VI – 0 0 2.2 –2 VI – –16 + 1.2 VI 350 800 VI 200 –1.8 –1.5 VI – ...

Page 3

... HOLD CAPACITOR (4ns) OBSERVED AT ANALOG OUTPUT "HOLD" "TRACK" CLOCK (PIN #19) CLOCK AD9100 Timing Diagram (1 ns/div) 1 Model AD9100JD AD9100AD AD9100AE AD9100SD AD9100SE NOTE l Consult factory about availability of parts screened to MIL-STD-883. –3– Test AD9100AE/SE/JD/AD/SD Level Min Typ Max 1.05 1. 118 VI 116 132 = 38 C/W ...

Page 4

AD9100 DIP PIN DESCRIPTIONS/CONNECTIONS Pin No. Description Connection 1 –V –5.2 V Power Supply S 2 GND Common Ground Plane 3 GND Common Ground Plane 4 V Analog Input Signal IN 5 –V –5.2 V Power Supply S 6 BYPASS ...

Page 5

Acquisition Time is the amount of time it takes the AD9100 to reacquire the analog input when switching from hold to track mode. The interval starts at the 50% clock transition point and ends when the input signal is reacquired ...

Page 6

AD9100 OUTPUT INPUT BUFFER BUFFER C H ACQUISITION TIME OUT t DHT t 6ns S TRACK HOLD TIME Figure 1. Acquisition Time Diagram The exaggerated illustration in Figure ...

Page 7

While a single ground plane is recommended, the analog signal and differential ECL clock ground currents follow a narrow path directly under their common voltage signal line. To reduce re- flections, especially when terminations are used for transmission line efficiency, ...

Page 8

AD9100 POST-AMP IF INPUT AD9100 AD9618 ±100 mV GAIN ADJ TO UTILIZE MAX T/H CLOCK ADC RANGE TRACK 20ns T/H CLOCK HOLD 5ns "1" ADC CLOCK "0" Figure 4. IF Sampling with Track-and-Hold This technique is not confined to processing ...

Page 9

DC 60 120 180 240 300 INPUT FREQUENCY – MHz Gain vs. Frequency (Track Mode) – p-p O ENCODE = 30 MSPS – 250 L –85 – 100 L –75 ...

Page 10

AD9100 TRACK COMMAND (NOT TO SCALE) 0.1% C HOLD 0.025% REFERENCE 0.025% 0. INPUT STEP 100 LOAD BUFFER TIME – ns AD9100 Acquisition Time ENCODE = 30 MSPS t TRACK ...

Page 11

V R ENCODE = 30 MSPS ALL HARMONICS ARE ALIASED 100 120 Frequency (500 kHz/Division) Analog Input = 12.1 MHz Bottom of AD9100/PCB Evaluation Board Viewed from Above EVALUATION ...

Page 12

AD9100 PIN 1 IDENTIFIER 0.175 (4.45) MAX OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 20-Pin Side-Brazed Ceramic DIP 1.052±0.011 (26.972±0.279) 0.020 0.005 (0.508 0.127) 0.100 (2.54) 0.05 (1.27) 0.020 (0.51) 0.016 (0.41) TYP TYP 28-Pin LCC Package 0.055 (1.40) ...

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