MF8CCJ National Semiconductor, MF8CCJ Datasheet - Page 3

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MF8CCJ

Manufacturer Part Number
MF8CCJ
Description
Manufacturer
National Semiconductor
Datasheet

Specifications of MF8CCJ

Architecture
Switched Capacitor
Cutoff Frequency
20KHz
Dual Supply Voltage (typ)
±5V
Power Supply Requirement
Single/Dual
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Package Type
MDIP
Lead Free Status / RoHS Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MF8CCJ
Manufacturer:
ON
Quantity:
6
Part Number:
MF8CCJ
Quantity:
23
Symbol
V
V
V
V
I
I
V
V
I
V
V
Symbol
V
I
V
A
GBW
SR
OH
OL
IN
B
T
T
OH
OL
IH
IL
IH
IL
OS
OUT
VOL
Op Amp Electrical Characteristics
load on the Op Amp output unless otherwise specified Boldface limits apply for T
Logic Input and Output Characteristics
a
b
Note 1 Absolute Maximum Raings indicate limits beyond which damage to the device may occur DC and AC electrical specifications do not apply when operating
the device beyond its specified operating conditions
Note 2 When the applied voltage at any pin falls outside the power supply voltages (V
limited to 1 mA or less
Note 3 The maximum power dissipation must be derated at elevated temperatures and is dictated by T
allowable power dissipation at any temperature is P
device T
increases to 65 C W
Note 4 The center frequency of each 2nd-order filter section is defined as the frequency where the phase shift through the filter is zero
Note 5 Q is defined as the measured center frequency divided by the measured bandwidth where the bandwidth is the difference between the two frequencies
where the gain is 3 dB less than the gain measured at the center frequency
Note 6 Dynamic range is defined as the ratio of the tested minimum output swing of 2 69 Vrms (
bandwidth For Qs of 1 or less the dynamic range and output swing will degrade because the gain at an internal node is 2 Q Keeping the input signal level below
1 23xQ Vrms will avoid distortion in this case
e
0V unless otherwise specified Boldface limits apply for T
Positive Threshold
Voltage on pin 8
Negative Threshold
Voltage on pin 8
Output Voltage on Min High
pin 9 (Note 12)
Output Current on Min Source Pin 9 tied to V
pin 9
Input Voltage on
pins 1 2 3 10
17
Input Current on pins 1 2
3 7 8 10 17
Input Voltage on
pin 7
JMAX
Maximum Input Offset Voltage
Maximum Input Bias Current
Minimum Output Voltage Swing R
Open Loop Gain
Gain Bandwidth
Product
Slew Rate
18 (Note 12)
e
125 C and the typical junction-to-ambient thermal resistance of the MF8CCN when board mounted is 50 C W For the MF8CCJ this number
Parameter
Parameter
18
Max Low
Min Sink
Min High
Max Low
Min High
Max Low
Max
Max
Min V
Min V
to V
to V
I
I
Pin 9 tied to V
V
V
O
O
S
S
a
a
e b
e a
D
e
e
b
b
e a
e a
Conditions
LOAD
e
V
V
e
e
(T
Conditions
a
a
10 A
10 A
JMAX
10V V
5V V
0V (Note 8)
0V (Note 8)
b
b
e
V
5 k
V
b
b
a
b
b
b
b
T
referred
referred
A
e b
)
e
(Note 9) (Note 10) (Note 11) (Note 9) (Note 10) (Note 11)
The following specifications apply for V
Typical
JA
0V or
g
5V
g
1 8
10
80
10
or the number given in the Absolute Maximum Ratings whichever is lower For this
3 5
MIN
8
3
(Note 9) (Note 10 (Note 11) (Note 9) (Note 10) (Note 11)
Typical Tested
0 35V
0 35V
to T
The following specifications apply for V
0 7V
0 7V
6 0
5 0
7 0
3 0
MF8CCN
IN k
Tested
Limit
MAX
g
S
S
S
S
20
V
b
MF8CCN
0 58V
0 89V
0 11V
0 47V
all other limits T
Limit
or V
9 0
1 0
3 0
2 5
2 0
0 8
10
IN l
g
Design
JMAX
S
S
S
S
3 8V peak-to-peak) to the wideband noise over a 20 kHz
Limit
MIN
V
a
Design Typical Tested
Limit
) the absolute value of current at that pin should be
to T
9 0
1 0
9 0
1 0
2 0
0 8
JA
10
and the ambient temperature T
MAX
Typical
A
g
e
g
1 8
10
80
10
3 5
0 35V
0 35V
8
0 7V
0 7V
T
all other limits T
a
6 0
5 0
7 0
3 0
J
e a
e
S
S
S
S
25 C
MF8CCJ
Tested
Limit
g
5V V
MF8CCJ
a
0 58V
0 89V
0 11V
0 47V
20
Limit
9 0
1 0
9 0
1 0
2 0
0 8
10
3 0
2 5
e a
b
S
S
S
S
A
e b
10V and V
e
Design
A
Limit
Design Units
T
Limit
The maximum
5V and no
J
e
25 C
b
Units
V
MHz
mV
pA
dB
mA
mA
V
V
V
V
V
V
V
V
V
V
V
A
s

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