ADV7183KST Analog Devices Inc, ADV7183KST Datasheet - Page 30

• Manufacturer Part Number: ADV7183KST
• Manufacturer: Analog Devices Inc

Specifications of ADV7183KST

• Adc/dac Resolution: 10b
• Screening Level: Commercial
• Package Type: LQFP
• Pin Count: 80
• Lead Free Status / RoHS Status: Not Compliant

ADV7183
NOTES
1
2
NOTES
1
2
3
Chroma Timing Adjust. Allows a specified timing difference between the luma and chroma samples.
Allows the Cr and Cb samples to be swapped.
If enabled via CLKMANE, CLKVAL[17:0] determines the fixed output frequency. On the LLC, LLC2, and LLCREF pins.
Clock Generator Manual Enable. Allows the analog clock generator to produce a fixed clock frequency that is not dependent on the video signal.
Allows the o/p of fixed 27 MHz crystal clock via LLC, LLC2, and LLCR EF o/p pins.
Bit Description Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Register Setting
RESERVED
CTA[2:0]
RESERVED
SWPC
Bit Description Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Register Setting
CLKVAL[17:16]
RESERVED
CLKMANE
FIX27E
Bit Description Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Register Setting
CLKVAL[15:8]
Bit Description Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Register Setting
CLKVAL[7:0]
If enabled via CLKMANE, CLKVAL[17:0] determines the fixed output frequency. On the LLC, LLC2, and LLCREF pins.
If enabled via CLKMANE, CLKVAL[17:0] determines the fixed output frequency. On the LLC, LLC2, and LLCREF pins.
2
3
1
2
1
0
1
0
1
X
X
1
0
1
X
X
Table XXXIII. Manual Clock Control 1 Register (Subaddress 28)
Table XXXIV. Manual Clock Control 2 Register (Subaddress 29)
Table XXXV. Manual Clock Control 3 Register (Subaddress 2A)
0
0
0
0
1
1
1
1
1
X
X
Table XXXII. Pixel Delay Control Register (Subaddress 27)
0
0
1
1
0
0
1
1
1
X
X
0
1
0
1
0
1
0
1
1
X
X
0
1
X
X
0
X
X
X
0
X
X
X
Set to Zero
Not Valid
Chroma + 2 Pixel (Early)
Chroma + 1 Pixel (Early)
No Delay
Chroma – 1 Pixel (Late)
Chroma – 2 Pixel (Late)
Chroma – 3 Pixel (Late)
Not Valid
Set to One
No Swapping
Swap the Cr and Cb Values
Set to Default
Output Frequency Set by Video
Frequency Set by CLKVAL[17:0]
Output Frequency Set by Clock Generator
Output 27 MHz Fixed