ISP1505ABS STEricsson, ISP1505ABS Datasheet - Page 20
ISP1505ABS
Manufacturer Part Number
ISP1505ABS
Description
Manufacturer
STEricsson
Datasheet
1.ISP1505ABS.pdf
(76 pages)
Specifications of ISP1505ABS
Lead Free Status / RoHS Status
Compliant
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ISP1505ABS
Manufacturer:
NXP
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NXP Semiconductors
ISP1505A_ISP1505C_3
Product data sheet
If a crystal is attached or a clock is driven into the XTAL1 pin, the ISP1505 will drive a
60 MHz clock out from the CLOCK pin when DIR deasserts. This is shown as CLOCK in
Figure
The recommended power-up sequence for the link is as follows:
The ULPI interface is ready for use.
1. The link waits for 1 ms, ignoring all the ULPI pin status.
2. The link may start to detect DIR status level. If DIR is detected as LOW for three clock
cycles, the link may send a RESET command.
4.
Rev. 03 — 26 August 2008
ULPI HS USB host and peripheral transceiver
ISP1505A; ISP1505C
© NXP B.V. 2008. All rights reserved.
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