XRT7295ATIWTR Exar Corporation, XRT7295ATIWTR Datasheet - Page 11

• Manufacturer Part Number: XRT7295ATIWTR
• Description: DS3/SONET STS-1 Line Receiver
• Manufacturer: Exar Corporation

Specifications of XRT7295ATIWTR

• Lead Free Status / RoHS Status: Contains lead / RoHS Compliant

JITTER ACCOMMODATION
Under all allowable operating conditions, the jitter
accommodation of the XRT7295AT device exceeds all
system
(BER<1E
nominal signal level) jitter accommodation for the
XRT7295AT is shown in Figure 10.
FALSE-LOCK IMMUNITY
False-lock is defined as the condition where a PLL
recovered clock obtains stable phase-lock at a frequency
not equal to the incoming data rate. The XRT7295AT
device
architecture to prevent false-lock. An on-chip frequency
comparator continuously compares the EXCLK reference
to the PLL clock. If the frequency difference between the
EXCLK and PLL clock exceeds approximately ±0.5%,
correction circuitry forces re-acquisition of the proper
frequency and phase.
ACQUISITION TIME
If a valid input signal is assumed to be already present at
R
power and error-free operation is 20ms. If power has
already been applied, the interval between the application
of valid data (or the action of valid data following a loss of
signal) and error-free operation is 4ms.
IN
, the maximum time between the application of device
40
10
1.0
0.1
Rev.1.20
1
uses
-9
G.824
requirements
). The typical (V
a
combination
10
TR-TSY-000499
Category 1
for
DD
Sinewave Jitter Frequency (Hz)
PUB 54014
100
= 5V, T = 25°C, DSX-3
error-free
TR-TSY-000499
frequency/phase-lock
Figure 10. Input Jitter Tolerance at DSX-3 Level
Category 2
1K
operation
10K
11
LOSS-OF-LOCK DETECTION
As stated above, the PLL acquisition aid circuitry monitors
the PLL clock frequency relative to the EXCLK frequency.
The RLOL alarm is activated if the difference between the
PLL clock and the EXCLK frequency exceeds
approximately ±0.5%.
This will not occur until at least 250 bit periods after loss of
input data.
XRT7295AT Typical
100K
-1
-2
-3
-4
-5
1
0
100
Figure 9. Typical PLL Jitter Transfer
500 1K
1000K
PEAK = 0.05dB
Characteristic
Frequency (Hz)
XRT7295AT
5K 10K
Frequency
f3dB = 205kHz
300k
XRT7295AT Typical
Jitter
(Hz)
10k
60k
1M
5k
50K100K 500K
Amplitude
Jitter
(U.I.)
0.4
0.5
10
5
1