XR16V794IV-F Exar Corporation, XR16V794IV-F Datasheet - Page 21

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XR16V794IV-F

Manufacturer Part Number
XR16V794IV-F
Description
3.3V HIGH PERFORMANCE QUAD UART
Manufacturer
Exar Corporation
Datasheet

Specifications of XR16V794IV-F

Features
*
Number Of Channels
4, QUART
Fifo's
64 Byte
Protocol
RS485
Voltage - Supply
2.25 V ~ 3.6 V
With Auto Flow Control
Yes
With Irda Encoder/decoder
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
Mounting Type
Surface Mount
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Quantity
Price
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XR16V794IV-F
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Part Number:
XR16V794IV-F
Manufacturer:
Exar Corporation
Quantity:
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REV. 1.0.1
INT3, INT2 and INT1 provide a 24-bit (3 bits per channel) encoded interrupt indicator.
encoding and their priority order. The 16-bit Timer time-out interrupt will show up only as a channel 0 interrupt.
For other channels, interrupt 7 is reserved.
.
F
3.1.1.1
3.1.1.2
IGURE
P
RIORITY
Bit
2
1
2
3
4
5
6
7
x
Reserved
13. T
Bit
1
Bit
Bit
2
0
0
0
0
1
1
1
1
0
HE
INT0 Channel Interrupt Indicator:
INT1, INT2 and INT3 Interrupt Source Locator
INT3 Register
Bit
Bit
G
2
T
1
0
0
1
1
0
0
1
1
ABLE
Reserved
LOBAL
HIGH PERFORMANCE 2.25V TO 3.6V QUAD UART WITH FRACTIONAL BAUD RATE
Bit
Bit
1
0
0 None (or wake-up indicator)
1 RXRDY & RX Line Status (logic OR of LSR[4:1]). RXRDY INT clears by reading data in the RX
0 RXRDY Time-out: Cleared same way as RXRDY INT.
1 TXRDY, THR or TSR (auto RS485 mode) empty, clears after reading ISR register.
0 MSR, RTS/CTS or DTR/DSR delta or Xoff/Xon or special character detected. The first two
1 Reserved.
0 Reserved.
1 TIMER Time-out, shows up as a channel 0 INT. It clears after reading the TIMERCNTL register.
9: UART C
FIFO until it falls below the trigger level; RX Line Status INT cleared after reading LSR register.
clears after reading MSR register; Xoff/Xon or special char. detect INT clears after reading ISR
register.
Reserved in other channels.
Bit
0
I
NTERRUPT
Bit
2
Reserved
Rsvd Rsvd Rsvd Rsvd
Bit-7
Bit
1
HANNEL
R
Bit
Bit-6
Individual UART Channel Interrupt Status
0
EGISTERS
Bit
2
[7:0] I
Reserved
Bit-5
INT0, INT1, INT2 and INT3
Bit
1
, INT0, INT1, INT2
Interrupt Registers,
INT2 Register
INT0 Register
NTERRUPT
Bit
Bit-4
0
I
NTERRUPT
Bit
21
2
Channel-3
Ch-3
Bit-3
Bit
1
S
S
OURCE
Bit-2
Ch-2
Bit
OURCE
0
Bit
AND
2
Ch-1
(
Bit-1
Channel-2
E
S
Rsvd
)
Bit-7
NCODING AND
Bit
1
AND
INT3
Rsvd
Bit-6
Ch-0
Bit-0
Bit
0
C
LEARING
Rsvd
Bit-5
Bit
2
Channel-1
INT0 Register
Rsvd
Bit-4
INT1 Register
Bit
1
C
LEARING
Ch-3
Bit-3
Table 9
Bit
0
Ch-2 Ch-1 Ch-0
Bit-2
Bit
2
Channel-0
Bit-1
XR16V794
shows the 3 bit
Bit
1
Bit-0
Bit
0

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