SY87813LHG Micrel Inc, SY87813LHG Datasheet - Page 13

3.3V Any-Rate 32-1250 Mbps CDR (I Temp, Green/32 Pin EP-TQFP/bulk)

SY87813LHG

Manufacturer Part Number
SY87813LHG
Description
3.3V Any-Rate 32-1250 Mbps CDR (I Temp, Green/32 Pin EP-TQFP/bulk)
Manufacturer
Micrel Inc
Type
Clock and Data Recovery (CDR)r
Datasheet

Specifications of SY87813LHG

Input
Differential
Output
Differential
Frequency - Max
1.3GHz
Voltage - Supply
3.15 V ~ 3.45 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-TQFP Exposed Pad, 32-eTQFP, 32-HTQFP, 32-VQFP
Frequency-max
1.3GHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
576-1586
Appendix A
Layout and General Suggestions
1.
2.
3.
4.
5.
November 2006
Establish controlled impedance stripline, microstrip, or
coplanar construction techniques.
Signal paths should have approximately the same width
as the device pads.
All differential paths are critical timing paths, where
skew should be matched to within ±10ps.
Signal trace impedance should not vary more than
±5%. If in doubt, perform TDR analysis of all high-speed
signal traces.
Maintain compact filter networks as close to filter pins
as possible. Provide ground plane relief under filter path
to reduce stray capacitance. Be careful of crosstalk
coupling into the filter network.
13
6.
7.
8.
Maintain low jitter on the REFCLK input. Isolate the
XTAL oscillator from power supply noise by adequately
decoupling. Keep XTAL oscillator close to device, and
minimize capacitive coupling from adjacent signals.
Higher speed operation may require use of
fundamental-tone (third-overtone typically has more
jitter) crystal-based oscillator for optimum performance.
Evaluate and compare candidates by measuring
TXCLK jitter.
All unused outputs must be terminated. To conserve
power, unused PECL outputs can be terminated with a
1kΩ resistor to V
hbwhelp@micrel.com
EE
.
or (408) 955-1690
M9999-112806-B

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