SY69754ALHG TR Micrel Inc, SY69754ALHG TR Datasheet - Page 13

• Manufacturer Part Number: SY69754ALHG TR
• Description: 3.3V 622 Mbps CDR (I Temp, Green/32 Pin TQFP/T+R)
• Manufacturer: Micrel Inc
• Type: Clock and Data Recovery (CDR)r

Specifications of SY69754ALHG TR

• Input: PECL, TTL
• Output: PECL, TTL
• Frequency - Max: 1.3GHz
• Voltage - Supply: 3.15 V ~ 3.45 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-TQFP Exposed Pad, 32-eTQFP, 32-HTQFP, 32-VQFP
• Frequency-max: 1.3GHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: SY69754ALHGTR; SY69754ALHGTR

Appendix A
Layout and General Suggestions
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August 2007
Establish controlled impedance stripline, microstrip, or
coplanar construction techniques.
Signal paths should have approximately the same width
as the device pads.
All differential paths are critical timing paths, where
skew should be matched to within ±10ps.
Signal trace impedance should not vary more than
±5%. If in doubt, perform TDR analysis of all high-speed
signal traces.
Maintain compact filter networks as close to filter pins
as possible. Provide ground plane relief under filter path
to reduce stray capacitance. Be careful of crosstalk
coupling into the filter network.
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Maintain low jitter on the REFCLK input. Isolate the
XTAL oscillator from power supply noise by adequately
decoupling. Keep XTAL oscillator close to device, and
minimize capacitive coupling from adjacent signals.
Higher speed operation may require use of
fundamental-tone (third-overtone typically has more
jitter) crystal-based oscillator for optimum performance.
Evaluate and compare candidates by measuring
TXCLK jitter.
All unused outputs require termination. To conserve
power, unused PECL outputs can be terminated with a
1kΩ resistor to VEE.
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