STM8AF6266TAX STMicroelectronics, STM8AF6266TAX Datasheet - Page 69

• Manufacturer Part Number: STM8AF6266TAX
• Description: 8 BITS MICROCONTR
• Manufacturer: STMicroelectronics
• Series: STM8Ar

Specifications of STM8AF6266TAX

• Core Processor: STM8A
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Lead Free Status / Rohs Status: Details

STM8AF61xx, STM8AF62xx
10.3.9
Table 40.
1. f
2. The pad has to be configured accordingly (fast mode).
3. Values based on design simulation and/or characterization results, and not tested in production.
4. Min time is for the minimum time to drive the output and the max time is for the maximum time to validate the data.
5. Min time is for the minimum time to invalidate the output and the max time is for the maximum time to put the data in Hi-Z.
t
t
t
t
dis(SO)
t
w(SCKH)
t
w(SCKL)
a(SO)
1/t
su(NSS)
Symbol
t
t
t
h(NSS)
t
t
t
t
su(MI)
t
h(MO)
su(SI)
v(MO)
h(SO)
t
v(SO)
t
h(MI)
h(SI)
r(SCK
f(SCK)
f
SCK
c(SCK)
SCK
(3)(4)
(3)
(3)(5)
(3)
(3)
(3)
(3)
< f
(3)
(3)
(3)
(3)
)
(3)
(3)
(3)
MASTER
SPI clock frequency
SPI clock rise and fall time Capacitive load: C = 30 pF
NSS setup time
NSS hold time
SCK high and low time
Data input setup time
Data input hold time
Data output access time
Data output disable time
Data output valid time
Data output valid time
Data output hold time
SPI serial peripheral interface
Unless otherwise specified, the parameters given in
performed under ambient temperature, f
conditions. t
Refer to I/O port characteristics for more details on the input/output alternate function
characteristics (NSS, SCK, MOSI, MISO).
SPI characteristics
/2.
Parameter
MASTER
= 1/f
Master mode
Slave mode
Slave mode
Slave mode
Master mode,
f
Master mode
Slave mode
Master mode
Slave mode
Slave mode
Slave mode
Slave mode
(after enable edge)
Master mode (after enable edge)
Slave mode (after enable edge)
Master mode (after enable edge)
MASTER
MASTER
Doc ID 14952 Rev 5
.
= 8 MHz, f
Conditions
MASTER
SCK
V
V
V
V
DD
DD
DD
DD
= 4 MHz
< 4.5 V
= 4.5 V to 5.5 V
< 4.5 V
= 4.5 V to 5.5 V
frequency and V
Table 40
are derived from tests
4 * t
DD
Electrical characteristics
Min
110
MASTER
70
10
25
31
12
0
0
5
5
7
0
-
-
-
-
-
supply voltage
3* t
25
Max
140
6
8
MASTER
30
10
75
53
(1)
(1)
-
-
-
-
-
-
-
-
(2)
MHz
Unit
69/91
ns