PIC32MX695F512LT-80I/PF Microchip Technology, PIC32MX695F512LT-80I/PF Datasheet - Page 139
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PIC32MX695F512LT-80I/PF
Manufacturer Part Number
PIC32MX695F512LT-80I/PF
Description
512KB Flash, 128KB RAM, 80 MHz, USB, ENET, 8 DMA 100 TQFP 14x14x1mm T/R
Manufacturer
Microchip Technology
Series
PIC® 32MXr
Datasheets
1.PIC32MX320F032H-40IPT.pdf
(66 pages)
2.PIC32MX575F256H-80IMR.pdf
(2 pages)
3.PIC32MX575F256H-80IMR.pdf
(254 pages)
4.PIC32MX575F256H-80IMR.pdf
(14 pages)
Specifications of PIC32MX695F512LT-80I/PF
Core Processor
MIPS32® M4K™
Core Size
32-Bit
Speed
80MHz
Connectivity
Ethernet, I²C, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
85
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP
Processor Series
PIC32MX6xx
Core
MIPS
3rd Party Development Tools
52713-733, 52714-737
Development Tools By Supplier
PG164130, DV164035, DV244005
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC32MX695F512LT-80I/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC32MX320F032H-40IPT PDF datasheet
- PIC32MX575F256H-80IMR PDF datasheet #2
- PIC32MX575F256H-80IMR PDF datasheet #3
- PIC32MX575F256H-80IMR PDF datasheet #4
- Current page: 139 of 254
- Download datasheet (6Mb)
17.0
FIGURE 17-1:
© 2010 Microchip Technology Inc.
Note 1: This data sheet summarizes the features
2: Some registers and associated bits
SERIAL PERIPHERAL
INTERFACE (SPI)
Note: Access SPIxTXB and SPIxRXB FIFOs via SPIxBUF register.
of the PIC32MX5XX/6XX/7XX family of
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 23. “Serial
Peripheral Interface (SPI)”
in the “PIC32 Family Reference Manual” ,
which is available from the Microchip web
site (www.microchip.com/PIC32).
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization”
this data sheet for device-specific register
and bit information.
SSx/F
SDOx
SCKx
SDIx
SYNC
SPI MODULE BLOCK DIAGRAM
Receive
Slave Select
Sync Control
and Frame
Read
SPIxRXB FIFO
bit 0
SPIxBUF
SPIxSR
(DS61106)
SPIxTXB FIFO
Control
Clock
Control
Shift
in
Write
Transmit
Data Bus
Internal
Select
Edge
The SPI module is a synchronous serial interface that
is useful for communicating with external peripherals
and other microcontroller devices. These peripheral
devices may be Serial EEPROMs, Shift registers, dis-
play drivers, A/D Converters, etc. The PIC32 SPI mod-
ule is compatible with Motorola
interfaces.
Following are some of the key features of this module:
• Master and Slave modes support
• Four different clock formats
• Enhanced Framed SPI protocol support
• User-configurable 8-bit, 16-bit and 32-bit data
• Separate SPI FIFO buffers for receive and
• Programmable interrupt event on every 8-bit,
• Operation during CPU Sleep and Idle mode
• Fast bit manipulation using CLR, SET and INV
PIC32MX5XX/6XX/7XX
width
transmit
- FIFO buffers act as 4/8/16-level deep FIFOs
16-bit and 32-bit data transfer
registers
based on 32/16/8-bit data width
Enable Master Clock
Baud Rate
Generator
FIFOs Share Address SPIxBUF
PBCLK
®
DS61156F-page 139
SPI and SIOP
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