PIC32MX320F064HT-40I/MR Microchip Technology, PIC32MX320F064HT-40I/MR Datasheet - Page 138

• Manufacturer Part Number: PIC32MX320F064HT-40I/MR
• Description: 64 KB Flash, 16 KB RAM, 40 MHz, 10-Bit ADC 64 QFN 9x9x0.9mm T/R
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX320F064HT-40I/MR

• Core Processor: MIPS32® M4K™
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: I²C, IrDA, LIN, PMP, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Processor Series: PIC32MX3xx
• Core: MIPS
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: EUART, I2C, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM320001, DM320002, MA320001
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC32MX3XX/4XX
26.2
This section describes the operation of the WDT and
Power-Up Timer of the PIC32MX3XX/4XX.
The WDT, when enabled, operates from the internal
Low-Power Oscillator (LPRC) clock source and can be
used to detect system software malfunctions by reset-
ting the device if the WDT is not cleared periodically in
software. Various WDT time-out periods can be
selected using the WDT postscaler. The WDT can also
be used to wake the device from Sleep or Idle mode.
The following are some of the key features of the WDT
module:
• Configuration or software controlled
• User-configurable time-out period
• Can wake the device from Sleep or Idle
FIGURE 26-1:
DS61143G-page 138
WDTCLR = 1
WDT Enable
WDT Enable
Reset Event
Watchdog Timer (WDT)
PWRT Enable
Oscillator
WDT Enable
LPRC
Wake
WATCHDOG AND POWER-UP TIMER BLOCK DIAGRAM
WDT Counter Reset
Clock
25-bit Counter
FWDTPS<4:0>(DEVCFG1<20:16>)
1:64 Output
25
1
Decoder
PWRT Enable
Power Save
© 2010 Microchip Technology Inc.
0
1
Control
PWRT
LPRC
Device Reset
NMI (Wake-up)