PIC24HJ64GP210AT-I/PT Microchip Technology, PIC24HJ64GP210AT-I/PT Datasheet - Page 28
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PIC24HJ64GP210AT-I/PT
Manufacturer Part Number
PIC24HJ64GP210AT-I/PT
Description
16 Bit MCU 40MIPS 64KB FLASH 100 TQFP 12x12x1mm T/R
Manufacturer
Microchip Technology
Series
PIC® 24Hr
Datasheets
1.PIC24HJ12GP201-ISO.pdf
(84 pages)
2.PIC24HJ64GP206A-IMR.pdf
(304 pages)
3.PIC24HJ64GP206A-IMR.pdf
(10 pages)
Specifications of PIC24HJ64GP210AT-I/PT
Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
85
Program Memory Size
64KB (22K x 24)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 32x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24HJ64GP210AT-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
4.2.10
The ERASEP command instructs the programming
executive to page erase [NUM_PAGES] of code mem-
ory. The code memory must be erased at an “even” 512
instruction word address boundary
Expected Response (2 words):
0x1900
0x0002
DS70152H-page 28
Opcode
Length
NUM_PAGES Up to 255
Addr_MSB
Addr_LS
15
Opcode
Field
NUM_PAGES
ERASEP
12 11
0x9
0x3
Most Significant Byte of the 24-bit
address
Least Significant 16 bits of the 24-bit
address
COMMAND
Addr_LS
8 7
Description
Length
Addr_MSB
0
4.2.11
The CRCP command performs a CRC-16 on the range
of memory specified. This command can substitute for
a full chip verify. Data is shifted in a packed method as
demonstrated
Significant Byte first.
Example:
CRC-CITT-16 with test data of “123456789” becomes
0x29B1
Expected Response (3 words):
QE_Code: 0x1C00
Length: 0x0003
CRC Value: 0xXXXX
Opcode
Length
Reserved
Addr_MSB
Addr_LSW
Size
15
Opcode
Field
Reserved
Reserved
CRCP
12 11
0xC
0x5
0x0
Most Significant Byte of 24-bit
address
Least Significant 16 bits of 24-bit
address
Number of 24-bit locations (address
range divided by 2)
in
COMMAND
Addr_LSW
Size_LSW
Figure
© 2010 Microchip Technology Inc.
8 7
Description
4-4,
Length
byte-wise
Addr_MSB
Size_MSB
Least
0