PIC24HJ64GP210A-E/PF Microchip Technology, PIC24HJ64GP210A-E/PF Datasheet - Page 23
![16 Bit MCU 40MIPS 64KB FLASH 100 TQFP 14x14x1mm TRAY](/photos/12/13/121330/c04-100-tqfp_sml.jpg)
PIC24HJ64GP210A-E/PF
Manufacturer Part Number
PIC24HJ64GP210A-E/PF
Description
16 Bit MCU 40MIPS 64KB FLASH 100 TQFP 14x14x1mm TRAY
Manufacturer
Microchip Technology
Series
PIC® 24Hr
Datasheets
1.PIC24HJ12GP201-ISO.pdf
(84 pages)
2.PIC24HJ64GP206A-IMR.pdf
(304 pages)
3.PIC24HJ64GP206A-IMR.pdf
(10 pages)
Specifications of PIC24HJ64GP210A-E/PF
Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
85
Program Memory Size
64KB (22K x 24)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 32x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24HJ64GP210A-E/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
4.0
4.1
The programmer and programming executive have a
master-slave relationship, where the programmer is
the master programming device and the programming
executive is the slave.
All communication is initiated by the programmer in the
form of a command. Only one command at a time can
be sent to the programming executive. In turn, the
programming executive only sends one response to
the programmer after receiving and processing a
command. The programming executive command set
is described in
Commands”. The response set is described in
Section 4.3 “Programming Executive
4.1.1
The ICSP/Enhanced ICSP interface is a 2-wire SPI
implemented using the PGCx and PGDx pins. The
PGCx pin is used as a clock input pin and the clock
source must be provided by the programmer. The PGDx
pin is used for sending command data to and receiving
response data from the programming executive.
FIGURE 4-1:
© 2010 Microchip Technology Inc.
PGCx
PGDx
Note:
Note:
1
P1B
MSb
P1A
2
THE PROGRAMMING
EXECUTIVE
Programming Executive
Communication
The Programming Executive (PE) can be
located within the following folder within
your installation of MPLAB
...\Microchip\MPLAB IDE\REAL ICE,
and then selecting the Hex PE file,
RIPE_01b_xxxxxx.hex
COMMUNICATION INTERFACE
AND PROTOCOL
For Enhanced ICSP, all serial data is
transmitted on the falling edge of PGCx
and latched on the rising edge of PGCx.
All data transmissions are sent to the Most
Significant bit first using 16-bit mode (see
Figure
14 13 12
3
P1
Section 4.2 “Programming Executive
4
4-1).
5
PROGRAMMING
EXECUTIVE SERIAL
TIMING
11
6
11
...
P2
12
5
13
4
.
®
14
IDE:
3
P3
Responses”.
15 16
2
1
LSb
Since a 2-wire SPI is used, and data transmissions are
bidirectional, a simple protocol is used to control the
direction of PGDx. When the programmer completes a
command transmission, it releases the PGDx line and
allows the programming executive to drive this line
high. The programming executive keeps the PGDx line
high to indicate that it is processing the command.
After the programming executive has processed the
command, it brings PGDx low (P9b) to indicate to the
programmer that the response is available to be
clocked out. The programmer can begin to clock out
the response after maximum wait (P9b) and it must
provide the necessary amount of clock pulses to
receive the entire response from the programming
executive.
After the entire response is clocked out, the
programmer should terminate the clock on PGCx until
it is time to send another command to the programming
executive. This protocol is illustrated in
4.1.2
In Enhanced ICSP mode, the dsPIC33F/PIC24H family
devices operate from the Fast Internal RC oscillator,
which has a nominal frequency of 7.3728 MHz. This
oscillator frequency yields an effective system clock
frequency of 1.8432 MHz. To ensure that the
programmer does not clock too fast, it is recommended
that a 1.85 MHz clock be provided by the programmer.
4.1.3
The programming executive uses no Watchdog or time
out for transmitting responses to the programmer. If the
programmer does not
mechanism using PGCx as described in
“Communication Interface and
possible that the programming executive will behave
unexpectedly while trying to send a response to the
programmer. Since the programming executive has no
time out, it is imperative that the programmer correctly
follow the described communication protocol.
As a safety measure, the programmer should use the
command time outs identified in
command time out expires, the programmer should
reset
programming the device again.
the
SPI RATE
TIME OUTS
programming
follow the
executive
DS70152H-page 23
Table
Protocol”, it is
Figure
Section 4.1.1
flow
4-1. If the
and
4-2.
control
start