PIC24HJ32GP302-E/MM Microchip Technology, PIC24HJ32GP302-E/MM Datasheet - Page 78
![16 Bit MCU 40MIPS 32 KB FLASH 28 QFN-S 6x6mm TUBE](/photos/6/81/68120/150-28-qfn_sml.jpg)
PIC24HJ32GP302-E/MM
Manufacturer Part Number
PIC24HJ32GP302-E/MM
Description
16 Bit MCU 40MIPS 32 KB FLASH 28 QFN-S 6x6mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 24Hr
Datasheets
1.PIC24HJ12GP201-ISO.pdf
(84 pages)
2.PIC24HJ32GP302-ISO.pdf
(368 pages)
3.PIC24HJ32GP302-ISO.pdf
(8 pages)
4.PIC24HJ32GP302-ISO.pdf
(12 pages)
Specifications of PIC24HJ32GP302-E/MM
Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
32KB (11K x 24)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Table D-2
checksum when using CodeGuard™ Security with
Boot Segment Program Flash code protection with
Standard Security and small-sized boot Flash.
TABLE D-2:
DS70152H-page 78
dsPIC33FJ256GP506A
Note 1:
Device
provides an example of how to calculate the
CFGB1 = Byte sum of ((FBS & 0xCD) + (FSS & 0xCF) + (FGS & 0x07) + (FOSCSEL & 0xA7) +
(FOSC & 0xC7) + (FWDT & 0xFF) + (FPOR & 0xE7) + (FICD & 0xE3))
CHECKSUM COMPUTATION EXAMPLE WHEN USING CodeGuard™ SECURITY
Disabled
Read Code
Protection
CFGB1
(1)
+ SUM(0:2ABFF) – SUM(0200:07FE)
Checksum Computation
© 2010 Microchip Technology Inc.
Erased Value
0xFD01