PIC24HJ32GP204-H/ML Microchip Technology, PIC24HJ32GP204-H/ML Datasheet - Page 4
![16-bit MCU, 32KB Flash,40 MIPS,nanoWatt 44 QFN 8x8x0.9mm TUBE](/photos/6/81/68122/150-44-qfn_sml.jpg)
PIC24HJ32GP204-H/ML
Manufacturer Part Number
PIC24HJ32GP204-H/ML
Description
16-bit MCU, 32KB Flash,40 MIPS,nanoWatt 44 QFN 8x8x0.9mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 24Hr
Datasheets
1.PIC24HJ12GP201-ISO.pdf
(84 pages)
2.PIC24HJ32GP202-ISO.pdf
(272 pages)
3.PIC24HJ32GP202-ISO.pdf
(8 pages)
4.PIC24HJ32GP202-ISO.pdf
(12 pages)
Specifications of PIC24HJ32GP204-H/ML
Core Processor
PIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
32KB (11K x 24)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 13x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 140°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC24HJ12GP201-ISO PDF datasheet
- PIC24HJ32GP202-ISO PDF datasheet #2
- PIC24HJ32GP202-ISO PDF datasheet #3
- PIC24HJ32GP202-ISO PDF datasheet #4
- Current page: 4 of 272
- Download datasheet (4Mb)
PIC24HJ32GP202/204 AND PIC24HJ16GP304
Communication Modules:
• 4-wire SPI
• I
• UART
DS70289G-page 4
- Framing supports I/O interface to simple
- Supports 8-bit and 16-bit data
- Supports all serial clock formats and
- Full Multi-Master Slave mode support
- 7-bit and 10-bit addressing
- Bus collision detection and arbitration
- Integrated signal conditioning
- Slave address masking
- Interrupt on address bit detect
- Interrupt on UART error
- Wake-up on Start bit from Sleep mode
- 4-character TX and RX FIFO buffers
- LIN bus support
- IrDA
- High-Speed Baud mode
- Hardware Flow Control with CTS and RTS
2
C™
codecs
sampling modes
®
encoding and decoding in hardware
Analog-to-Digital Converters (ADCs):
• 10-bit, 1.1 Msps or 12-bit, 500 ksps conversion:
CMOS Flash Technology:
• Low-power, high-speed Flash technology
• Fully static design
• 3.3V (±10%) operating voltage
• Industrial and extended temperature
• Low-power consumption
Packaging:
• 28-pin SDIP/SOIC/SSOP/QFN-S
• 44-pin QFN/TQFP
- Two and four simultaneous samples (10-bit ADC)
- Up to 13 input channels with auto-scanning
- Conversion start can be manual or
- Conversion possible in Sleep mode
- ±2 LSb max integral nonlinearity
- ±1 LSb max differential nonlinearity
Note:
synchronized with one of four trigger sources
See
features per device.
Table 1
© 2011 Microchip Technology Inc.
for the exact peripheral
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