PIC24HJ32GP204-E/ML Microchip Technology, PIC24HJ32GP204-E/ML Datasheet - Page 32
![16-bit MCU, 32KB Flash,40 MIPS,nanoWatt 44 QFN 8x8x0.9mm TUBE](/photos/6/81/68122/150-44-qfn_sml.jpg)
PIC24HJ32GP204-E/ML
Manufacturer Part Number
PIC24HJ32GP204-E/ML
Description
16-bit MCU, 32KB Flash,40 MIPS,nanoWatt 44 QFN 8x8x0.9mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 24Hr
Datasheets
1.PIC24HJ12GP201-ISO.pdf
(84 pages)
2.PIC24HJ32GP202-ISO.pdf
(272 pages)
3.PIC24HJ32GP202-ISO.pdf
(8 pages)
4.PIC24HJ32GP202-ISO.pdf
(12 pages)
Specifications of PIC24HJ32GP204-E/ML
Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
32KB (11K x 24)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 13x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC24HJ12GP201-ISO PDF datasheet
- PIC24HJ32GP202-ISO PDF datasheet #2
- PIC24HJ32GP202-ISO PDF datasheet #3
- PIC24HJ32GP202-ISO PDF datasheet #4
- Current page: 32 of 272
- Download datasheet (4Mb)
TABLE 4-5:
TABLE 4-6:
TABLE 4-7:
TMR1
PR1
T1CON
TMR2
TMR3HLD
TMR3
PR2
PR3
T2CON
T3CON
Legend:
IC1BUF
IC1CON
IC2BUF
IC2CON
IC7BUF
IC7CON
IC8BUF
IC8CON
Legend:
OC1RS
OC1R
OC1CON
OC2RS
OC2R
OC2CON
Legend:
SFR Name
SFR Name
SFR Name
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Addr
010A
010C
010E
Addr
015A
015C
015E
SFR
0100
0102
0104
0106
0108
0110
0112
SFR
0140
0142
0144
0146
0158
Addr
0180
0182
0184
0186
0188
018A
SFR
TIMER REGISTER MAP
INPUT CAPTURE REGISTER MAP
OUTPUT COMPARE REGISTER MAP
Bit 15
Bit 15
Bit 15
TON
TON
TON
—
—
—
—
—
—
Bit 14
Bit 14
Bit 14
—
—
—
—
—
—
—
—
—
ICSIDL
ICSIDL
ICSIDL
ICSIDL
OCSIDL
OCSIDL
Bit 13
Bit 13
TSIDL
TSIDL
TSIDL
Bit 13
Bit 12
Bit 12
Bit 12
—
—
—
—
—
—
—
—
—
Bit 11
Bit 11
Bit 11
—
—
—
—
—
—
—
—
—
Bit 10
Bit 10
Bit 10
—
—
—
—
—
—
—
—
—
Timer3 Holding Register (for 32-bit timer operations only)
Bit 9
Bit 9
Bit 9
Output Compare 1 Secondary Register
Output Compare 2 Secondary Register
—
—
—
—
—
—
—
—
—
Output Compare 1 Register
Output Compare 2 Register
Input 1 Capture Register
Input 2 Capture Register
Input 7 Capture Register
Input 8Capture Register
Bit 8
Period Register 1
Period Register 2
Period Register 3
Bit 8
Bit 8
Timer1 Register
Timer2 Register
Timer3 Register
—
—
—
—
—
—
—
—
—
ICTMR
ICTMR
ICTMR
ICTMR
Bit 7
Bit 7
Bit 7
—
—
—
—
—
TGATE
TGATE
TGATE
Bit 6
Bit 6
Bit 6
—
—
ICI<1:0>
ICI<1:0>
ICI<1:0>
ICI<1:0>
Bit 5
Bit 5
Bit 5
—
—
TCKPS<1:0>
TCKPS<1:0>
TCKPS<1:0>
OCFLT
OCFLT
Bit 4
Bit 4
ICOV
ICOV
ICOV
ICOV
Bit 4
OCTSEL
OCTSEL
ICBNE
ICBNE
ICBNE
ICBNE
Bit 3
Bit 3
Bit 3
T32
—
—
TSYNC
Bit 2
Bit 2
Bit 2
—
—
OCM<2:0>
OCM<2:0>
ICM<2:0>
ICM<2:0>
ICM<2:0>
ICM<2:0>
Bit 1
Bit 1
Bit 1
TCS
TCS
TCS
Bit 0
Bit 0
Bit 0
—
—
—
Resets
Resets
Resets
xxxx
xxxx
0000
xxxx
xxxx
0000
0000
FFFF
0000
0000
xxxx
0000
FFFF
FFFF
0000
0000
xxxx
0000
xxxx
0000
xxxx
0000
xxxx
0000
All
All
All
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