PIC24HJ256GP610T-I/PT Microchip Technology, PIC24HJ256GP610T-I/PT Datasheet - Page 171

256KB, Flash, 16384bytes-RAM, 40MIPS, 85I/O, 16-bit Family 100 TQFP 12x12x1mm T/

PIC24HJ256GP610T-I/PT

Manufacturer Part Number
PIC24HJ256GP610T-I/PT
Description
256KB, Flash, 16384bytes-RAM, 40MIPS, 85I/O, 16-bit Family 100 TQFP 12x12x1mm T/
Manufacturer
Microchip Technology
Series
PIC® 24Hr

Specifications of PIC24HJ256GP610T-I/PT

Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
85
Program Memory Size
256KB (85.5K x 24)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 32x10b, 32x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFQFP
Processor Series
PIC24HJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
CAN, I2C, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
85
Number Of Timers
13
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (12 bit, 32 Channel)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARDAC164333 - MODULE SKT FOR PM3 100QFPDM300024 - KIT DEMO DSPICDEM 1.1MA240012 - MODULE PLUG-IN PIC24H 100QFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC24HJ256GP610T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
18.0
The Universal Asynchronous Receiver Transmitter
(UART) module is one of the serial I/O modules avail-
able in the PIC24HJXXXGPX06/X08/X10 device fam-
ily. The UART is a full-duplex asynchronous system
that can communicate with peripheral devices, such as
personal computers, LIN, RS-232 and RS-485 inter-
faces. The module also supports a hardware flow con-
trol option with the UxCTS and UxRTS pins and also
includes an IrDA
The primary features of the UART module are:
• Full-Duplex, 8 or 9-bit Data Transmission through
• Even, Odd or No Parity Options (for 8-bit data)
• One or Two Stop bits
FIGURE 18-1:
© 2009 Microchip Technology Inc.
Note:
the UxTX and UxRX pins
Note 1: Both UART1 and UART2 can trigger a DMA data transfer. If U1TX, U1RX, U2TX or U2RX is selected as
2: If DMA transfers are required, the UART TX/RX FIFO buffer must be set to a size of 1 byte/word
UNIVERSAL ASYNCHRONOUS
RECEIVER TRANSMITTER
(UART)
This data sheet summarizes the features
of the PIC24HJXXXGPX06/X08/X10 fam-
ily of devices. However, it is not intended
to be a comprehensive reference source.
To complement the information in this data
sheet, refer to the “PIC24H Family Refer-
ence Manual”, Section 17. “UART”
(DS70232), which is available from the
Microchip website (www.microchip.com).
a DMA IRQ source, a DMA transfer occurs when the U1TXIF, U1RXIF, U2TXIF or U2RXIF bit gets set as
a result of a UART1 or UART2 transmission or reception.
(i.e., UTXISEL<1:0> = 00 and URXISEL<1:0> = 00).
®
encoder and decoder.
UART SIMPLIFIED BLOCK DIAGRAM
Hardware Flow Control
Baud Rate Generator
UART Transmitter
UART Receiver
IrDA
PIC24HJXXXGPX06/X08/X10
®
• Hardware Flow Control Option with UxCTS and
• Fully Integrated Baud Rate Generator with 16-bit
• Baud rates ranging from 1 Mbps to 15 bps at 16x
• Baud rates ranging from 4 Mbps to 61 bps at 4x mode
• 4-deep First-In-First-Out (FIFO) Transmit Data
• 4-Deep FIFO Receive Data Buffer
• Parity, Framing and Buffer Overrun Error Detection
• Support for 9-bit mode with Address Detect
• Transmit and Receive Interrupts
• A Separate Interrupt for all UART Error Conditions
• Loopback mode for Diagnostic Support
• Support for Sync and Break Characters
• Supports Automatic Baud Rate Detection
• IrDA
• 16x Baud Clock Output for IrDA
A simplified block diagram of the UART is shown in
Figure 18-1. The UART module consists of the key
important hardware elements:
• Baud Rate Generator
• Asynchronous Transmitter
• Asynchronous Receiver
UxRTS pins
Prescaler
mode at 40 MIPS
at 40 MIPS
Buffer
(9th bit = 1)
®
Encoder and Decoder Logic
BCLK
UxRTS
UxCTS
UxTX
UxRX
®
DS70175H-page 169
Support

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