PIC24HJ128GP506A-I/MR Microchip Technology, PIC24HJ128GP506A-I/MR Datasheet - Page 43
![16 Bit MCU 40MIPS 128KB FLASH 64 QFN 9x9x0.9mm TUBE](/photos/12/13/121325/c04-149_mr_sml.jpg)
PIC24HJ128GP506A-I/MR
Manufacturer Part Number
PIC24HJ128GP506A-I/MR
Description
16 Bit MCU 40MIPS 128KB FLASH 64 QFN 9x9x0.9mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 24Hr
Datasheets
1.PIC24HJ12GP201-ISO.pdf
(84 pages)
2.PIC24HJ64GP206A-IMR.pdf
(304 pages)
3.PIC24HJ64GP206A-IMR.pdf
(10 pages)
Specifications of PIC24HJ128GP506A-I/MR
Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (43K x 24)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 18x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Processor Series
PIC24HJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
8192 B
Interface Type
SPI, I2C, UART
Maximum Clock Frequency
7.37 MHz
Number Of Timers
13
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 140 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
16 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARD
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
dsPIC33F/PIC24H PROGRAMMING SPECIFICATION
Table 5-7
shows the ICSP programming details for
clearing the Configuration registers. In Step 1, the
Reset vector is exited. In Step 2, the write pointer (W7)
is loaded with 0x0000, which is the original destination
address (in TBLPAG, 0xF8 of program memory). In
Step 3, the NVMCON is set to program one
Configuration register. In Step 4, the TBLPAG register
is initialized to 0xF8 for writing to the Configuration
registers. In Step 5, the value to write to each
Configuration register is loaded to W0. In Step 6, the
Configuration register data is written to the write latch
using the TBLWTL instruction. In Steps 7 and 8, the
programming cycle is initiated. In Step 9, the internal
PC is set to 0x200 as a safety measure to prevent the
PC from incrementing into unimplemented memory.
Lastly, Steps 4-9 are repeated until all twelve
Configuration registers are written.
© 2010 Microchip Technology Inc.
DS70152H-page 43