PIC24HJ128GP204-E/ML Microchip Technology, PIC24HJ128GP204-E/ML Datasheet - Page 139
![16-bit MCU, 128KB Flash,DMA,40 MIPS,nanoWatt 44 QFN 8x8x0.9mm TUBE](/photos/6/81/68122/150-44-qfn_sml.jpg)
PIC24HJ128GP204-E/ML
Manufacturer Part Number
PIC24HJ128GP204-E/ML
Description
16-bit MCU, 128KB Flash,DMA,40 MIPS,nanoWatt 44 QFN 8x8x0.9mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 24Hr
Datasheets
1.PIC24HJ12GP201-ISO.pdf
(84 pages)
2.PIC24HJ32GP302-ISO.pdf
(368 pages)
3.PIC24HJ32GP302-ISO.pdf
(8 pages)
4.PIC24HJ32GP302-ISO.pdf
(12 pages)
Specifications of PIC24HJ128GP204-E/ML
Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
128KB (43K x 24)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 13x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARDDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC24HJ12GP201-ISO PDF datasheet
- PIC24HJ32GP302-ISO PDF datasheet #2
- PIC24HJ32GP302-ISO PDF datasheet #3
- PIC24HJ32GP302-ISO PDF datasheet #4
- Current page: 139 of 368
- Download datasheet (5Mb)
11.7
The PIC24HJ32GP302/304, PIC24HJ64GPX02/X04
and
implement 27 registers for remappable peripheral
configuration:
• 14 Input Remappable Peripheral Registers:
• 13 Output Remappable Peripheral Registers:
REGISTER 11-1:
© 2011 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-13
bit 12-8
bit 7-0
- RPINR0-RPINR1, RPINR3-RPINR4,
- RPOR0-RPOR12
Note:
RPINR7, RPINR10-RPINR11, RPINR18-
RPINR23 and PRINR26
U-0
U-0
PIC24HJ128GPX02/X04
—
—
Peripheral Pin Select Registers
Input and Output Register values can only
be
(OSCCON<6>)
Section 11.6.3.1
Lock”
PIC24HJ32GP302/304, PIC24HJ64GPX02/X04 AND PIC24HJ128GPX02/X04
Unimplemented: Read as ‘0’
INT1R<4:0>: Assign External Interrupt 1 (INTR1) to the corresponding RPn pin
11111 = Input tied to V
11001 = Input tied to RP25
•
•
•
00001 = Input tied to RP1
00000 = Input tied to RP0
Unimplemented: Read as ‘0’
changed
for a specific command sequence.
U-0
U-0
—
—
RPINR0: PERIPHERAL PIN SELECT INPUT REGISTER 0
if
is
W = Writable bit
‘1’ = Bit is set
“Control
the
family
set
U-0
U-0
—
—
IOLOCK
to
SS
of
‘0’.
Register
devices
R/W-1
See
U-0
bit
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-1
U-0
—
INT1R<4:0>
R/W-1
U-0
—
x = Bit is unknown
R/W-1
U-0
—
DS70293E-page 139
R/W-1
U-0
—
bit 8
bit 0
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