PIC24FJ48GA004-I/ML Microchip Technology, PIC24FJ48GA004-I/ML Datasheet - Page 35
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PIC24FJ48GA004-I/ML
Manufacturer Part Number
PIC24FJ48GA004-I/ML
Description
16-bit Family, 16 MIPS, 48KB Flash, 8192 Bytes RAM, 35 I/O, NanoWatt 44 QFN 8x8x
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheets
1.PIC24FJ16GA002-ISS.pdf
(52 pages)
2.PIC24FJ16GA002-ISS.pdf
(268 pages)
3.PIC24FJ16GA002-ISS.pdf
(22 pages)
Specifications of PIC24FJ48GA004-I/ML
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
48KB (16K x 24)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARDDM240011 - KIT STARTER MPLAB FOR PIC24F MCUAC162088 - HEADER MPLAB ICD2 24FJ64GA004 28AC164336 - MODULE SOCKET FOR PM3 28/44QFNDV164033 - KIT START EXPLORER 16 MPLAB ICD2
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
FIGURE 5-3:
5.2
The programming executive command set is shown in
Table 5-1. This table contains the opcode, mnemonic,
length, time-out and description for each command.
Functional details on each command are provided in
Section 5.2.4 “Command Descriptions”.
5.2.1
All programming executive commands have a general
format consisting of a 16-bit header and any required
data for the command (see Figure 5-4). The 16-bit
header consists of a 4-bit opcode field, which is used to
identify the command, followed by a 12-bit command
length field.
FIGURE 5-4:
The command opcode must match one of those in the
command set. Any command that is received which
does not match the list in Table 5-1 will return a “NACK”
response (see Section 5.3.1.1 “Opcode Field”).
The command length is represented in 16-bit words
since the SPI operates in 16-bit mode. The program-
ming executive uses the command length field to
determine the number of words to read from the SPI
port. If the value of this field is incorrect, the command
will not be properly received by the programming
executive.
© 2008 Microchip Technology Inc.
15
Opcode
Command Data First Word (if required)
Command Data Last Word (if required)
PGCx
PGDx
Programming Executive
Commands
12
COMMAND FORMAT
11
1
MSB X X X LSB
Last Command Word
PGCx = Input
PGDx = Input
2
Host Transmits
PROGRAMMING EXECUTIVE – PROGRAMMER COMMUNICATION PROTOCOL
COMMAND FORMAT
15 16
•
•
Length
P8
Programming Executive
Processes Command
P9
PGCx = Input (Idle)
1
PGDx = Output
0
0
P20
5.2.2
When 24-bit instruction words are transferred across
the 16-bit SPI interface, they are packed to conserve
space using the format shown in Figure 5-5. This
format minimizes traffic over the SPI and provides the
programming executive with data that is properly
aligned for performing table write operations.
FIGURE 5-5:
5.2.3
The
unsupported commands. Additionally, due to the
memory constraints of the programming executive, no
checking is performed on the data contained in the
programmer command. It is the responsibility of the
programmer to command the programming executive
with valid command arguments or the programming
operation may fail. Additional information on error
handling is provided in Section 5.3.1.3 “QE_Code
Field”.
LSWx: Least Significant 16 bits of instruction word
MSBx: Most Significant Bytes of instruction word
Note:
PIC24FJXXXGA0XX
15
programming
1
MSB X X X LSB
2
MSB2
PACKED DATA FORMAT
When the number of instruction words
transferred is odd, MSB2 is zero and
LSW2 can not be transmitted.
PROGRAMMING EXECUTIVE
ERROR HANDLING
Host Clocks Out Response
15 16
PGDx = Output
PGCx = Input
PACKED INSTRUCTION
WORD FORMAT
executive
P21
LSW1
LSW2
8 7
1
MSB X X X LSB
2
will
DS39768D-page 35
15 16
MSB1
“NACK”
0
all