PIC24FJ48GA004-I/ML Microchip Technology, PIC24FJ48GA004-I/ML Datasheet - Page 129
![16-bit Family, 16 MIPS, 48KB Flash, 8192 Bytes RAM, 35 I/O, NanoWatt 44 QFN 8x8x](/photos/6/81/68122/150-44-qfn_sml.jpg)
PIC24FJ48GA004-I/ML
Manufacturer Part Number
PIC24FJ48GA004-I/ML
Description
16-bit Family, 16 MIPS, 48KB Flash, 8192 Bytes RAM, 35 I/O, NanoWatt 44 QFN 8x8x
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheets
1.PIC24FJ16GA002-ISS.pdf
(52 pages)
2.PIC24FJ16GA002-ISS.pdf
(268 pages)
3.PIC24FJ16GA002-ISS.pdf
(22 pages)
Specifications of PIC24FJ48GA004-I/ML
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
48KB (16K x 24)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARDDM240011 - KIT STARTER MPLAB FOR PIC24F MCUAC162088 - HEADER MPLAB ICD2 24FJ64GA004 28AC164336 - MODULE SOCKET FOR PM3 28/44QFNDV164033 - KIT START EXPLORER 16 MPLAB ICD2
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC24FJ16GA002-ISS PDF datasheet
- PIC24FJ16GA002-ISS PDF datasheet #2
- PIC24FJ16GA002-ISS PDF datasheet #3
- Current page: 129 of 268
- Download datasheet (2Mb)
FIGURE 12-2:
FIGURE 12-3:
2010 Microchip Technology Inc.
Note 1:
Note 1:
Set T2IF (T4IF)
Set T3IF (T5IF)
ADC Event Trigger
2:
(T5CK)
(T4CK)
T3CK
T2CK
This peripheral’s inputs must be assigned to an available RPn pin before use. Please see Section
10.4 “Peripheral Pin Select” for more information.
This peripheral’s inputs must be assigned to an available RPn pin before use. Please see Section
10.4 “Peripheral Pin Select” for more information.
The ADC event trigger is available only on Timer3.
TIMER2 AND TIMER4 (16-BIT SYNCHRONOUS) BLOCK DIAGRAM
TIMER3 AND TIMER5 (16-BIT SYNCHRONOUS) BLOCK DIAGRAM
TGATE
(2)
TGATE
1
0
1
0
Reset
Reset
Equal
Equal
TMR2 (TMR4)
TMR3 (TMR5)
Comparator
Comparator
PR2 (PR4)
PR3 (PR5)
PIC24FJ64GA004 FAMILY
Q
Q
Sync
Q
Q
Gate
Sync
CK
CK
D
D
T
T
CY
CY
1x
01
00
Sync
1x
00
01
TON
TON
TCS
TGATE
TCS
TGATE
(1)
(1)
(1)
(1)
TCKPS1:TCKPS0
TCKPS1:TCKPS0
1, 8, 64, 256
1, 8, 64, 256
Prescaler
Prescaler
2
DS39881D-page 129
2
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