PIC24FJ48GA002T-I/SS Microchip Technology, PIC24FJ48GA002T-I/SS Datasheet - Page 65

• Manufacturer Part Number: PIC24FJ48GA002T-I/SS
• Description: 16-bit Family, 16 MIPS, 48KB Flash, 8192 Bytes RAM, 21 I/O, NanoWatt 28 SSOP .20
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ48GA002T-I/SS

• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, PMP, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 48KB (16K x 24)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SSOP
• Processor Series: PIC24FJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, IrDA, SPI, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240011, DV164033, MA240013, DM300027, AC164127, DM240002
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 10 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM240011 - KIT STARTER MPLAB FOR PIC24F MCUAC162088 - HEADER MPLAB ICD2 24FJ64GA004 28AC164338 - MOD SKT PIC24F/DSPIC33F 28SOICDV164033 - KIT START EXPLORER 16 MPLAB ICD2
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

REGISTER 7-1:
REGISTER 7-2:
 2010 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-5
Note 1:
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 3
Note 1:
IPL2
R/W-0
U-0
U-0
U-0
—
—
—
2:
3:
2:
(2,3)
See Register 3-1 for the description of the remaining bit(s) that are not dedicated to interrupt control
functions.
The IPL bits are concatenated with the IPL3 bit (CORCON<3>) to form the CPU interrupt priority level.
The value in parentheses indicates the interrupt priority level if IPL3 = 1.
The IPL Status bits are read-only when NSTDIS (INTCON1<15>) = 1.
See Register 3-2 for the description of the remaining bit(s) that are not dedicated to interrupt control
functions.
The IPL3 bit is concatenated with the IPL2:IPL0 bits (SR<7:5>) to form the CPU interrupt priority level.
IPL2:IPL0: CPU Interrupt Priority Level Status bits
111 = CPU interrupt priority level is 7 (15). User interrupts disabled.
110 = CPU interrupt priority level is 6 (14)
101 = CPU interrupt priority level is 5 (13)
100 = CPU interrupt priority level is 4 (12)
011 = CPU interrupt priority level is 3 (11)
010 = CPU interrupt priority level is 2 (10)
001 = CPU interrupt priority level is 1 (9)
000 = CPU interrupt priority level is 0 (8)
IPL3: CPU Interrupt Priority Level Status bit
1 = CPU interrupt priority level is greater than 7
0 = CPU interrupt priority level is 7 or less
IPL1
R/W-0
U-0
U-0
U-0
—
—
—
(2,3)
SR: ALU STATUS REGISTER (IN CPU)
CORCON: CPU CONTROL REGISTER
W = Writable bit
‘1’ = Bit is set
C = Clearable bit
W = Writable bit
‘1’ = Bit is set
IPL0
R/W-0
U-0
U-0
U-0
—
—
—
(2,3)
RA
U-0
R-0
U-0
U-0
PIC24FJ64GA004 FAMILY
—
—
—
(1)
(2)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
IPL3
R/W-0
R/C-0
U-0
N
U-0
—
—
(2,3)
(1)
(2)
PSV
R/W-0
R/W-0
OV
U-0
U-0
—
—
(1)
(1)
x = Bit is unknown
x = Bit is unknown
R/W-0
U-0
Z
U-0
U-0
—
—
—
(1)
DS39881D-page 65
R/W-0
DC
R-0
C
U-0
U-0
—
—
(1)
(1)
bit 8
bit 0
bit 8
bit 0