PIC24FJ48GA002-E/SS Microchip Technology, PIC24FJ48GA002-E/SS Datasheet - Page 262
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PIC24FJ48GA002-E/SS
Manufacturer Part Number
PIC24FJ48GA002-E/SS
Description
16-bit Family, 16 MIPS, 48KB Flash, 8192 Bytes RAM, 21 I/O, NanoWatt 28 SSOP .20
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheets
1.PIC24FJ16GA002-ISS.pdf
(52 pages)
2.PIC24FJ16GA002-ISS.pdf
(268 pages)
3.PIC24FJ16GA002-ISS.pdf
(22 pages)
Specifications of PIC24FJ48GA002-E/SS
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
48KB (16K x 24)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SSOP
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
I2C, IrDA, SPI, UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
21
Number Of Timers
5
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240011, DV164033, MA240013, DM300027, AC164127, DM240002
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM240011 - KIT STARTER MPLAB FOR PIC24F MCUAC162088 - HEADER MPLAB ICD2 24FJ64GA004 28AC164338 - MOD SKT PIC24F/DSPIC33F 28SOICDV164033 - KIT START EXPLORER 16 MPLAB ICD2
Eeprom Size
-
Lead Free Status / Rohs Status
Details
PIC24FJ64GA004 FAMILY
Equations
Errata .................................................................................... 8
F
Flash Configuration Words.................................. 32, 207–210
Flash Program Memory
I
I/O Ports
I
Idle Mode .......................................................................... 104
Instruction Set
Instruction-Based Power-Saving Modes ........................... 103
Inter-Integrated Circuit. See I
Internet Address................................................................ 265
Interrupts
J
JTAG Interface .................................................................. 214
M
Microchip Internet Web Site .............................................. 265
MPLAB ASM30 Assembler, Linker, Librarian ................... 218
MPLAB ICD 2 In-Circuit Debugger.................................... 219
MPLAB ICE 2000 High-Performance Universal
MPLAB Integrated Development Environment
MPLAB PM3 Device Programmer..................................... 219
MPLAB REAL ICE In-Circuit Emulator System................. 219
MPLINK Object Linker/MPLIB Object Librarian ................ 218
DS39881D-page 262
2
C
A/D Clock Conversion Period ................................... 198
Baud Rate Reload Calculation .................................. 153
Calculating the PWM Period ..................................... 136
Calculation for Maximum PWM Resolution............... 136
Device and SPI Clock Speed Relationship ............... 150
UART Baud Rate with BRGH = 0 ............................. 160
UART Baud Rate with BRGH = 1 ............................. 160
and Table Instructions................................................. 49
Enhanced ICSP Operation.......................................... 50
Programming Algorithm .............................................. 52
RTSP Operation.......................................................... 50
Single-Word Programming.......................................... 54
Analog Port Configuration ......................................... 106
Input Change Notification.......................................... 106
Open-Drain Configuration ......................................... 106
Parallel (PIO) ............................................................ 105
Peripheral Pin Select ................................................ 107
Pull-ups ..................................................................... 106
Clock Rates............................................................... 153
Peripheral Remapping Options ................................. 151
Reserved Addresses................................................. 153
Slave Address Masking ............................................ 153
Overview ................................................................... 223
Summary................................................................... 221
Alternate Interrupt Vector Table (AIVT) ...................... 61
and Reset Sequence .................................................. 61
Implemented Vectors .................................................. 63
Interrupt Vector Table (IVT) ........................................ 61
Registers ............................................................... 64–92
Setup and Service Procedures ................................... 93
Trap Vectors ............................................................... 62
Vector Table................................................................ 62
In-Circuit Emulator .................................................... 219
Software .................................................................... 217
2
C........................................ 151
N
Near Data Space ................................................................ 34
O
Oscillator Configuration
Output Compare
P
Packaging
Parallel Master Port. See PMP. ........................................ 167
Peripheral Enable Bits ...................................................... 104
Peripheral Module Disable (PMD) bits.............................. 104
Peripheral Pin Select (PPS).............................................. 107
PICSTART Plus Development Programmer..................... 220
Pinout Descriptions....................................................... 13–18
PMP
Power-Saving Features .................................................... 103
Power-up Requirements ................................................... 213
Product Identification System ........................................... 267
Program Memory
Pulse-Width Modulation. See PWM.................................. 136
R
Reader Response............................................................. 266
Register Maps
Clock Switching ........................................................ 100
Initial Configuration on POR ....................................... 96
Oscillator Modes ......................................................... 96
PWM Mode ............................................................... 136
Single Output Pulse Generation ............................... 135
Details....................................................................... 249
Marking ..................................................................... 247
Available Peripherals and Pins ................................. 107
Configuration Control................................................ 109
Considerations for Use ............................................. 110
Input Mapping ........................................................... 107
Mapping Exceptions ................................................. 109
Output Mapping ........................................................ 108
Peripheral Priority ..................................................... 107
Registers .......................................................... 111–124
Master Port Examples ...................................... 174–176
Access Using Table Instructions................................. 47
Address Construction ................................................. 45
Address Space ........................................................... 31
Flash Configuration Words ......................................... 32
Memory Map............................................................... 31
Organization ............................................................... 32
Program Space Visibility............................................. 48
A/D Converter (ADC) .................................................. 41
Clock Control .............................................................. 44
CPU ............................................................................ 35
CRC ............................................................................ 42
Dual Comparator ........................................................ 42
I
ICN ............................................................................. 35
Input Capture .............................................................. 37
Interrupt Controller...................................................... 36
NVM............................................................................ 44
Output Compare ......................................................... 38
Pad Configuration ....................................................... 40
Parallel Master/Slave Port .......................................... 41
Peripheral Pin Select .................................................. 43
PMD............................................................................ 44
2
C .............................................................................. 38
Sequence ......................................................... 101
Period and Duty Cycle Calculation ................... 137
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