PIC24FJ32GA104-I/PT Microchip Technology, PIC24FJ32GA104-I/PT Datasheet - Page 27

• Manufacturer Part Number: PIC24FJ32GA104-I/PT
• Description: 16-bit, 16 MIPS, 32KB Flash, 8KB RAM, Nanowatt XLP 44 TQFP 10x10x1mm TRAY
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 24Fr

Specifications of PIC24FJ32GA104-I/PT

• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 32KB (11K x 24)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1004 - PIC24 BREAKOUT BOARD
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.6
4.6.1
The PIC24FJ64GA1/GB0 families have Configuration
bits stored in the last three locations of implemented
program memory (see Table 2-2 for locations). These
bits can be set or cleared to select various device con-
figurations. There are three types of Configuration bits:
system operation bits, code-protect bits and unit ID bits.
The system operation bits determine the power-on
settings for system level components, such as
oscillator and Watchdog Timer. The code-protect bits
prevent program memory from being read and written.
TABLE 4-2:
© 2009 Microchip Technology Inc.
DEBUG
DSWDTEN
DSWDTOSC
DSWDTPS<3:0>
DSBOR
FCKSM<1:0>
Note 1:
Bit Field
Configuration Bits Programming
Available on PIC24FJXXXGB0XX devices only.
OVERVIEW
PIC24FJ64GA1/GB0 CONFIGURATION BITS DESCRIPTION
CW4<3:0>
CW2<7:6>
CW1<11>
Register
CW4<7>
CW4<4>
CW4<6>
Background Debug Enable bit
1 = Device will reset in User mode
0 = Device will reset in Debug mode
Deep Sleep Watchdog Timer Enable bit
1 = DSWDT enabled
0 = DSWDT disabled
DSWDT Reference Clock Select bit
1 = DSWDT uses LPRC as reference clock
0 = DSWDT uses SOSC as reference clock
DSWDT Postscaler Select bits (assumes a DSWDT 1:32 prescaler)
1111 = 1:2,147,483,648 (25.7 days)
1110 = 1:536,870,912 (6.4 days)
1101 = 1:134,217,728 (38.5 hours)
1100 = 1:33,554,432 (9.6 hours)
1011 = 1:8,388,608 (2.4 hours)
1010 = 1:2,097,152 (36 minutes)
1001 = 1:524,288 (9 minutes)
1000 = 1:131,072 (135 seconds)
0111 = 1:32,768 (34 seconds)
0110 = 1:8,192 (8.5 seconds)
0101 = 1:2,048 (2.1 seconds)
0100 = 1:512 (528 ms)
0011 = 1:128 (132 ms)
0010 = 1:32 (33 ms)
0001 = 1:8 (8.3 ms)
0000 = 1:2 (2.1 ms)
Deep Sleep BOR Enable bit
1 = BOR enabled in Deep Sleep
0 = BOR disabled in Deep Sleep (does not affect Sleep mode)
Clock Switching Mode bits
1x = Clock switching is disabled, Fail-Safe Clock Monitor is disabled
01 = Clock switching is enabled, Fail-Safe Clock Monitor is disabled
00 = Clock switching is enabled, Fail-Safe Clock Monitor is enabled
The descriptions for the Configuration bits in the Flash
Configuration Words are shown in Table 4-2.
PIC24FJ64GA1/GB0
Note:
Description
Although not implemented with a specific
function, the bit at CW1<15> must always
be maintained as ‘0’ to ensure device
functionality, regardless of the settings of
other Configuration bits.
DS39934B-page 27