PIC24FJ32GA004T-I/ML Microchip Technology, PIC24FJ32GA004T-I/ML Datasheet - Page 29
![32KB, Flash, 8192bytes-RAM, 16MIPS, 35I/O, 16-bit Family,nanoWatt 44 QFN 8x8x0.9](/photos/6/81/68122/150-44-qfn_sml.jpg)
PIC24FJ32GA004T-I/ML
Manufacturer Part Number
PIC24FJ32GA004T-I/ML
Description
32KB, Flash, 8192bytes-RAM, 16MIPS, 35I/O, 16-bit Family,nanoWatt 44 QFN 8x8x0.9
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheets
1.PIC24FJ16GA002-ISS.pdf
(52 pages)
2.PIC24FJ16GA002-ISS.pdf
(268 pages)
3.PIC24FJ16GA002-ISS.pdf
(22 pages)
Specifications of PIC24FJ32GA004T-I/ML
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
32KB (11K x 24)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM240011 - KIT STARTER MPLAB FOR PIC24F MCUAC162088 - HEADER MPLAB ICD2 24FJ64GA004 28AC164336 - MODULE SOCKET FOR PM3 28/44QFNDV164033 - KIT START EXPLORER 16 MPLAB ICD2
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PIC24FJ32GA004T-I/MLTR
4.4
The term “Blank Check” implies verifying that the
device has been successfully erased and has no
programmed memory locations. A blank or erased
memory location is always read as ‘1’.
The Device ID registers (FF0002h:FF0000h) can be
ignored by the Blank Check since this region stores
device information that cannot be erased. The device
Configuration registers are also ignored by the Blank
Check. Additionally, all unimplemented memory space
should be ignored by the Blank Check.
The QBLANK command is used for the Blank Check. It
determines if the code memory is erased by testing
these memory regions. A ‘BLANK’ or ‘NOT BLANK’
response is returned. If it is determined that the device
is not blank, it must be erased before attempting to
program the chip.
4.5
4.5.1
Code memory is programmed with the PROGP
command. PROGP programs one row of code memory
starting from the memory address specified in the
command. The number of PROGP commands
required to program a device depends on the number
of write blocks that must be programmed in the device.
A flowchart for programming code memory is shown in
Figure 4-4. In this example, all 44K instruction words of
a PIC24FJ128GA device are programmed. First, the
number
‘RemainingCmds’ in the flowchart) is set to 688 and the
destination address (called ‘BaseAddress’) is set to ‘0’.
Next, one write block in the device is programmed with
a PROGP command. Each PROGP command
contains data for one row of code memory of the
PIC24FJXXXGA0XX device. After the first command is
processed successfully, ‘RemainingCmds’ is decre-
mented by 1 and compared with 0. Since there are
more PROGP commands to send, ‘BaseAddress’ is
incremented by 80h to point to the next row of memory.
On the second PROGP command, the second row is
programmed. This process is repeated until the entire
device is programmed. No special handling must be
performed when a panel boundary is crossed.
© 2008 Microchip Technology Inc.
Blank Check
Code Memory Programming
PROGRAMMING METHODOLOGY
of
commands
to
send
(called
FIGURE 4-4:
PIC24FJXXXGA0XX
BaseAddress + 80h
BaseAddress =
No
RemainingCmds = 688
Command to Program
RemainingCmds – 1
BaseAddress = 00h
RemainingCmds =
PROGP response
RemainingCmds
FLOWCHART FOR
PROGRAMMING CODE
MEMORY
Send PROGP
BaseAddress
PASS?
Finish
Start
Are
‘0’?
Is
Yes
Yes
DS39768D-page 29
Report Error
Failure
No