PIC24FJ32GA004T-I/ML Microchip Technology, PIC24FJ32GA004T-I/ML Datasheet - Page 160
![32KB, Flash, 8192bytes-RAM, 16MIPS, 35I/O, 16-bit Family,nanoWatt 44 QFN 8x8x0.9](/photos/6/81/68122/150-44-qfn_sml.jpg)
PIC24FJ32GA004T-I/ML
Manufacturer Part Number
PIC24FJ32GA004T-I/ML
Description
32KB, Flash, 8192bytes-RAM, 16MIPS, 35I/O, 16-bit Family,nanoWatt 44 QFN 8x8x0.9
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheets
1.PIC24FJ16GA002-ISS.pdf
(52 pages)
2.PIC24FJ16GA002-ISS.pdf
(268 pages)
3.PIC24FJ16GA002-ISS.pdf
(22 pages)
Specifications of PIC24FJ32GA004T-I/ML
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
32KB (11K x 24)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM240011 - KIT STARTER MPLAB FOR PIC24F MCUAC162088 - HEADER MPLAB ICD2 24FJ64GA004 28AC164336 - MODULE SOCKET FOR PM3 28/44QFNDV164033 - KIT START EXPLORER 16 MPLAB ICD2
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PIC24FJ32GA004T-I/MLTR
- PIC24FJ16GA002-ISS PDF datasheet
- PIC24FJ16GA002-ISS PDF datasheet #2
- PIC24FJ16GA002-ISS PDF datasheet #3
- Current page: 160 of 268
- Download datasheet (2Mb)
PIC24FJ64GA004 FAMILY
17.1
The UART module includes a dedicated 16-bit Baud
Rate Generator. The UxBRG register controls the
period of a free-running, 16-bit timer. Equation 17-1
shows the formula for computation of the baud rate
with BRGH = 0.
EQUATION 17-1:
Example 17-1 shows the calculation of the baud rate
error for the following conditions:
• F
• Desired Baud Rate = 9600
EXAMPLE 17-1:
DS39881D-page 160
Note 1:
Desired Baud Rate
Solving for UxBRG value:
Calculated Baud Rate= 4000000/(16 (25 + 1))
Error
Note 1:
CY
= 4 MHz
UART Baud Rate Generator (BRG)
UxBRG
UxBRG
UxBRG
Baud Rate =
UxBRG =
Based on F
and PLL are disabled.
Based on F
UART BAUD RATE WITH
BRGH = 0
BAUD RATE ERROR CALCULATION (BRGH = 0)
= F
= ((F
= ((4000000/9600)/16) – 1
= 25
= 9615
= (Calculated Baud Rate – Desired Baud Rate)
= (9615 – 9600)/9600
= 0.16%
16 • (UxBRG + 1)
CY
16 • Baud Rate
CY
Desired Baud Rate
CY
= F
CY
= F
/(16 (UxBRG + 1))
F
F
CY
OSC
/Desired Baud Rate)/16) – 1
CY
OSC
(1)
/2, Doze mode
/2; Doze mode and PLL are disabled.
– 1
The maximum baud rate (BRGH = 0) possible is
F
possible is F
Equation 17-2 shows the formula for computation of
the baud rate with BRGH = 1.
EQUATION 17-2:
The maximum baud rate (BRGH = 1) possible is F
(for UxBRG = 0) and the minimum baud rate possible
is F
Writing a new value to the UxBRG register causes the
BRG timer to be reset (cleared). This ensures the BRG
does not wait for a timer overflow before generating the
new baud rate.
CY
Note 1:
CY
/16 (for UxBRG = 0) and the minimum baud rate
/(4 * 65536).
Baud Rate =
UxBRG =
CY
Based on F
and PLL are disabled.
/(16 * 65536).
(1)
UART BAUD RATE WITH
BRGH = 1
2010 Microchip Technology Inc.
4 • (UxBRG + 1)
CY
4 • Baud Rate
= F
F
F
OSC
CY
CY
(1)
/2, Doze mode
– 1
CY
/4
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