PIC24F16KA302T-I/SS Microchip Technology, PIC24F16KA302T-I/SS Datasheet - Page 59
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PIC24F16KA302T-I/SS
Manufacturer Part Number
PIC24F16KA302T-I/SS
Description
16KB Flash, 2KB RAM, 512B EEPROM, 16 MIPS, 12-bit ADC, CTMU, XLP 28 SSOP .209in
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr
Specifications of PIC24F16KA302T-I/SS
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
16KB (5.5K x 24)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 13x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP (0.209", 5.30mm Width)
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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5.0
The PIC24FV32KA304 of devices contains internal
Flash program memory for storing and executing appli-
cation code. The memory is readable, writable and
erasable when operating with V
Flash memory can be programmed in three ways:
• In-Circuit Serial Programming™ (ICSP™)
• Run-Time Self Programming (RTSP)
• Enhanced In-Circuit Serial Programming
ICSP allows a PIC24FV32KA304 device to be serially
programmed while in the end application circuit. This is
simply done with two lines for the programming clock
and programming data (which are named PGECx and
PGEDx, respectively), and three other lines for power
(V
E
manufacture boards with unprogrammed devices and
then program the microcontroller just before shipping
the product. This also allows the most recent firmware
or custom firmware to be programmed.
FIGURE 5-1:
2011 Microchip Technology Inc.
ntry
Note:
(Enhanced ICSP)
DD
), ground (V
V
oltage (MCLR/V
FLASH PROGRAM MEMORY
This data sheet summarizes the features of
this group of PIC24F devices. It is not
intended to be a comprehensive reference
source. For more information on Flash pro-
gramming, refer to the “PIC24F Family
Reference Manual”, Section 4. “Program
Memory” (DS39715).
User/Configuration
Space Select
SS
) and Master Clear/Program mode
ADDRESSING FOR TABLE REGISTERS
PP
). This allows customers to
Using
Program
Counter
Using
Table
Instruction
DD
over 1.8V.
1/0
0
TBLPAG Reg
8 Bits
PIC24FV32KA304 FAMILY
Program Counter
24-Bit EA
24 Bits
Run Time Self Programming (RTSP) is accomplished
using TBLRD (table read) and TBLWT (table write)
instructions. With RTSP, the user may write program
memory data in blocks of 32 instructions (96 bytes) at
a time, and erase program memory in blocks of 32, 64
and 128 instructions (96,192 and 384 bytes) at a time.
The NVMOP<1:0> (NVMCON<1:0>) bits decide the
erase block size.
5.1
Regardless of the method used, Flash memory
programming is done with the table read and write
instructions. These allow direct read and write access to
the program memory space from the data memory while
the device is in normal operating mode. The 24-bit target
address in the program memory is formed using the
TBLPAG<7:0> bits and the Effective Address (EA) from
a W register, specified in the table instruction, as
depicted in
The TBLRDL and the TBLWTL instructions are used to
read or write to bits<15:0> of program memory.
TBLRDL and TBLWTL can access program memory in
both Word and Byte modes.
The TBLRDH and TBLWTH instructions are used to read
or write to bits<23:16> of program memory. TBLRDH
and TBLWTH can also access program memory in Word
or Byte mode.
Working Reg EA
Table Instructions and Flash
Programming
16 Bits
Figure
5-1.
0
Byte
Select
DS39995B-page 59
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