PIC18LF13K22-E/ML Microchip Technology, PIC18LF13K22-E/ML Datasheet - Page 11
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PIC18LF13K22-E/ML
Manufacturer Part Number
PIC18LF13K22-E/ML
Description
8KB Flash, 256bytes RAM, 256bytes EEPROM, 16MIPS, NanoWatt XLP 20 QFN 4x4mm TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18LF13K22-ISS.pdf
(388 pages)
2.PIC18LF13K22-ISS.pdf
(12 pages)
3.PIC18LF13K22-ISS.pdf
(36 pages)
Specifications of PIC18LF13K22-E/ML
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-VQFN Exposed Pad, 20-HVQFN, 20-SQFN, 20-DHVQFN
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
EUSART, I2C, SPI
Maximum Clock Frequency
32 KHz
Number Of Programmable I/os
18
Number Of Timers
4
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
A/d Bit Size
10 bit
A/d Channels Available
12
Height
0.88 mm
Length
4 mm
Supply Voltage (max)
3.6 V
Supply Voltage (min)
1.8 V, 2.7 V
Width
4 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
4.0
Programming includes the ability to erase or write the
various memory regions within the device.
In all cases, except high-voltage ICSP Bulk Erase, the
EECON1 register must be configured in order to
operate on a particular memory region.
When using the EECON1 register to act on program
Flash, the EEPGD bit must be set (EECON1<7> = 1)
and the CFGS bit must be cleared (EECON1<6> = 0).
The WREN bit must be set (EECON1<2> = 1) to
enable writes of any sort (e.g., erases) and this must be
done prior to initiating a write sequence. The FREE bit
must be set (EECON1<4> = 1) in order to erase the
program space being pointed to by the Table Pointer.
The erase or write sequence is initiated by setting the
WR bit (EECON1<1> = 1). It is strongly recommended
that the WREN bit only be set immediately prior to a
program or erase.
4.1
4.1.1
Erasing
accomplished by configuring two Bulk Erase Control
registers located at 3C0004h and 3C0005h. Program
Flash may be erased portions at a time, or the user may
erase the entire device in one action. Bulk Erase
operations will also clear any code-protect settings
associated with the memory block erased. Erase
options are detailed in Table 4-1. If data EEPROM is
code-protected (CPD = 0), the user must request an
erase of data EEPROM (e.g., 0084h as shown in
Table 4-1).
TABLE 4-1:
The actual Bulk Erase function is a self-timed
operation. Once the erase has started (falling edge of
the 4th PGC after the NOP command), serial execution
will cease until the erase completes (parameter P11).
During this time, PGC may continue to toggle but PGD
must be held low.
© 2009 Microchip Technology Inc.
Chip Erase
Erase User IDs
Erase Data EEPROM
Erase Boot Block
Erase Config Bits
Erase Program Flash Block 0
Erase Program Flash Block 1
Erase Program Flash Block 2
Erase Program Flash Block 3
DEVICE PROGRAMMING
ICSP Erase
Description
program
HIGH-VOLTAGE ICSP BULK ERASE
BULK ERASE OPTIONS
Flash
or
(3C0005h:3C0004h)
data
0F8Fh
0088h
0084h
0081h
0082h
0180h
0280h
0480h
0880h
EEPROM
Data
Advance Information
is
PIC18F1XK22/LF1XK22
The code sequence to erase the entire device is shown
in Table 4-2 and the flowchart is shown in Figure 4-1.
TABLE 4-2:
FIGURE 4-1:
Command
Note:
0000
0000
0000
0000
0000
0000
1100
0000
0000
0000
0000
0000
0000
1100
0000
0000
4-Bit
A Bulk Erase is the only way to reprogram
code-protect bits from an “on” state to an
“off” state.
Payload
0E 3C
6E F8
6E F7
6E F6
0E 3C
6E F8
6E F7
6E F6
0E 00
0E 05
0F 0F
0E 00
0E 04
8F 8F
00 00
00 00
Data
3C0004h to Erase
Delay P11 + P10
BULK ERASE COMMAND
SEQUENCE
Write 8F8Fh to
Entire Device
Write 0F0Fh
to 3C0005h
BULK ERASE FLOW
Done
Time
Start
MOVLW 3Ch
MOVWF TBLPTRU
MOVLW 00h
MOVWF TBLPTRH
MOVLW 05h
MOVWF TBLPTRL
Write 0Fh to 3C0005h
MOVLW 3Ch
MOVWF TBLPTRU
MOVLW 00h
MOVWF TBLPTRH
MOVLW 04h
MOVWF TBLPTRL
Write 8F8Fh TO 3C0004h
to erase entire device.
NOP
Hold PGD low until erase
completes.
Core Instruction
DS41357B-page 11