PIC18F67K90-E/MR Microchip Technology, PIC18F67K90-E/MR Datasheet - Page 178

• Manufacturer Part Number: PIC18F67K90-E/MR
• Description: 128kB Flash, 4kB RAM, 1kB EE, NanoWatt XLP, LCD 64 QFN 9x9x0.9mm TUBE
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F67K90-E/MR

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-VFQFN Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F87K90 FAMILY
TABLE 11-16: PORTH FUNCTIONS
DS39957D-page 178
RH0/SEG47/
AN23
RH1/SEG46/
AN22
RH2/SEG45/
AN21
RH3/SEG44/
AN20
RH4/SEG40/
CCP9/P3C/
AN12/C2INC
RH5/SEG41/
CCP8/P3B/
AN13/C2IND
Legend:
Pin Name
O = Output, I = Input, ANA = Analog Signal, DIG = Digital Output, ST = Schmitt Trigger Buffer Input,
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
Function
SEG47
SEG46
SEG45
SEG44
SEG40
SEG41
C2INC
C2IND
CCP9
CCP8
AN23
AN22
AN21
AN20
AN12
AN13
RH0
RH1
RH2
RH3
RH4
RH5
P3C
P3B
Setting
TRIS
0
1
1
1
0
1
1
1
0
1
1
1
0
1
1
1
0
1
1
0
1
0
1
x
0
1
1
0
1
0
1
x
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Type
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
I/O
ST
ST
ST
ST
ST
ST
ST
ST
—
—
LATH<0> data output.
PORTH<0> data input.
LCD Segment 47 output; disables all other pin functions.
A/D Input Channel 23. Default input configuration on POR; does not
affect digital input.
LATH<1> data output.
PORTH<1> data input.
LCD Segment 46 output; disables all other pin functions.
A/D Input Channel 22. Default input configuration on POR; does not
affect digital input.
LATH<2> data output.
PORTH<2> data input.
LCD Segment 45 output; disables all other pin functions.
A/D Input Channel 21. Default input configuration on POR; does not
affect digital input.
LATH<3> data output.
PORTH<3> data input.
LCD Segment 44 output; disables all other pin functions.
A/D Input Channel 20.
Default input configuration on POR; does not affect digital input.
LATH<4> data output.
PORTH<4> data input.
LCD Segment 40 output; disables all other pin functions.
CCP9 compare/PWM output; takes priority over port data.
CCP9 capture input.
ECCP3 PWM Output C. May be configured for tri-state during
Enhanced PWM.
A/D Input Channel 12. Default input configuration on POR; does not
affect digital input.
Comparator 2 Input C.
LATH<5> data output.
PORTH<5> data input.
LCD Segment 41 output; disables all other pin functions.
CCP8 compare/PWM output; takes priority over port data.
CCP8 capture input.
ECCP3 PWM Output B. May be configured for tri-state during
Enhanced PWM.
A/D Input Channel 13. Default input configuration on POR; does not
affect digital input.
Comparator 2 Input D.
Description
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