PIC18F45K20-E/ML Microchip Technology, PIC18F45K20-E/ML Datasheet - Page 189
![32KB, Flash, 1536bytes-RAM, 36I/O, 8-bit Family,nanowatt XLP 44 QFN 8x8x0.9mm TU](/photos/6/81/68122/150-44-qfn_sml.jpg)
PIC18F45K20-E/ML
Manufacturer Part Number
PIC18F45K20-E/ML
Description
32KB, Flash, 1536bytes-RAM, 36I/O, 8-bit Family,nanowatt XLP 44 QFN 8x8x0.9mm TU
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18F25K20T-ISS.pdf
(42 pages)
2.PIC18F25K20T-ISS.pdf
(12 pages)
3.PIC18F25K20T-ISS.pdf
(14 pages)
4.PIC18F25K20T-ISS.pdf
(456 pages)
5.PIC18F45K20-IPT.pdf
(78 pages)
Specifications of PIC18F45K20-E/ML
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM240313 - BOARD DEMO 8BIT XLPAC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPDM164124 - KIT STARTER FOR PIC18F4XK20AC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC18F25K20T-ISS PDF datasheet
- PIC18F25K20T-ISS PDF datasheet #2
- PIC18F25K20T-ISS PDF datasheet #3
- PIC18F25K20T-ISS PDF datasheet #4
- PIC18F45K20-IPT PDF datasheet #5
- Current page: 189 of 456
- Download datasheet (4Mb)
16.4.7.1
The STRSYNC bit of the PSTRCON register gives the
user two selections of when the steering event will
happen. When the STRSYNC bit is ‘0’, the steering
event will happen at the end of the instruction that
writes to the PSTRCON register. In this case, the
output signal at the P1<D:A> pins may be an
incomplete PWM waveform. This operation is useful
when the user firmware needs to immediately remove
a PWM signal from the pin.
When the STRSYNC bit is ‘1’, the effective steering
update will happen at the beginning of the next PWM
period. In this case, steering on/off the PWM output will
always produce a complete PWM waveform.
FIGURE 16-15:
FIGURE 16-16:
2010 Microchip Technology Inc.
P1<D:A>
P1<D:A>
STRn
PWM
STRn
PWM
Steering Synchronization
PORT Data
EXAMPLE OF STEERING EVENT AT END OF INSTRUCTION (STRSYNC = 0)
EXAMPLE OF STEERING EVENT AT BEGINNING OF INSTRUCTION
(STRSYNC = 1)
PWM Period
PORT Data
P1n = PWM
Figures 16-15 and 16-16 illustrate the timing diagrams
of the PWM steering depending on the STRSYNC
setting.
PIC18F2XK20/4XK20
P1n = PWM
PORT Data
PORT Data
DS41303G-page 189
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