PIC18F44K20T-I/MV Microchip Technology, PIC18F44K20T-I/MV Datasheet - Page 63
![16KB, Flash, 768bytes-RAM, 36I/O, 8-bit Family,nanowatt XLP 40 UQFN 5x5x0.5mm T/](/photos/16/15/161538/qfn-40_sml.jpg)
PIC18F44K20T-I/MV
Manufacturer Part Number
PIC18F44K20T-I/MV
Description
16KB, Flash, 768bytes-RAM, 36I/O, 8-bit Family,nanowatt XLP 40 UQFN 5x5x0.5mm T/
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet
1.PIC18F25K20T-ISS.pdf
(456 pages)
Specifications of PIC18F44K20T-I/MV
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-UFQFN Exposed Pad
Processor Series
PIC18
Core
PIC18F
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
I2C, SPI, SCI, USB, MSSP, RJ11
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
35
Number Of Timers
4
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
MPLAB Integrated Development Environment
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 85 C
Supply Current (max)
14 uA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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TABLE 4-4:
2010 Microchip Technology Inc.
CM2CON1
SLRCON
SSPMSK
Legend:
Note 1:
Register
2:
3:
4:
5:
6:
u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt vector
(0008h or 0018h).
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are updated with
the current value of the PC. The STKPTR is modified to point to the next location in the hardware stack.
See Table 4-3 for Reset value for specific condition.
Bits 6 and 7 of PORTA, LATA and TRISA are enabled, depending on the oscillator mode selected. When not enabled as
PORTA pins, they are disabled and read ‘0’.
All bits of the ANSELH register initialize to ‘0’ if the PBADEN bit of CONFIG3H is ‘0’.
INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
PIC18F2XK20 PIC18F4XK20
PIC18F2XK20 PIC18F4XK20
PIC18F2XK20 PIC18F4XK20
Applicable Devices
Brown-out Reset
Power-on Reset,
0000 ----
---1 1111
1111 1111
PIC18F2XK20/4XK20
RESET Instruction,
MCLR Resets,
Stack Resets
WDT Reset,
0000 ----
---1 1111
1111 1111
Wake-up via WDT
DS41303G-page 63
or Interrupt
uuuu ----
---u uuuu
uuuu uuuu
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