PIC18F13K22T-I/SO Microchip Technology, PIC18F13K22T-I/SO Datasheet - Page 83
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PIC18F13K22T-I/SO
Manufacturer Part Number
PIC18F13K22T-I/SO
Description
8KB Flash, 256bytes RAM, 256bytes EEPROM, 16MIPS, 1.8-5.5V Operation 20 SOIC .30
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Specifications of PIC18F13K22T-I/SO
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SOIC (7.5mm Width)
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
EUSART, I2C, SPI
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
18
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
A/d Bit Size
10 bit
A/d Channels Available
12
Height
2.05 mm
Length
12.8 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.8 V, 2.7 V
Width
7.5 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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TABLE 8-1:
2010 Microchip Technology Inc.
RA0/AN0/CV
V
PGD
RA1/AN1/C12IN0-/
V
RA2/AN2/C1OUT/
T0CKI/INT2/SRQ
RA3/MCLR/V
RA4/AN3/OSC2/
CLKOUT
RA5/OSC1/CLKIN/
T13CKI
Legend:
REF
REF
Note 1: RA3 does not have a corresponding TRISA bit. This pin is always an input regardless of mode.
-/C1IN+/INT0/
+/INT1/PGC
Pin
DIG = Digital level output; TTL = TTL input buffer; ST = Schmitt Trigger input buffer; ANA = Analog level input/output;
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
REF
PP
/
PORTA I/O SUMMARY
Function
CLKOUT
C12IN0-
C1OUT
T13CKI
CV
C1IN+
T0CKI
MCLR
CLKIN
V
OSC2
OSC1
V
INT0
PGD
INT1
PGC
INT2
SRQ
RA0
AN0
RA1
AN1
RA2
AN2
RA3
RA4
AN3
RA5
V
REF
REF
PP
REF
+
-
Setting
TRIS
—
—
—
0
1
1
x
1
1
1
x
x
0
1
1
1
1
1
x
x
0
1
1
0
1
1
0
0
1
1
x
x
0
1
x
x
1
(1)
I/O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Type
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
DIG
TTL
DIG
DIG
DIG
TTL
DIG
DIG
TTL
DIG
DIG
DIG
TTL
DIG
DIG
TTL
I/O
ST
ST
ST
ST
ST
ST
ST
ST
ST
Preliminary
LATA<0> data output.
PORTA<0> data input; Programmable weak pull-up.
ADC channel 0 input.
Comparator reference voltage output.
ADC and Comparator voltage reference voltage (low) input.
Comparator C1 non-inverting input.
External interrupt 0.
Serial execution data output for ICSP™.
Serial execution data input for ICSP™.
LATA<1> data output.
PORTA<1> data input; Programmable weak pull-up.
ADC channel 1.
Comparator C1 and C2 non-inverting input channel 0.
Comparator reference voltage (high) input ADC qual.
External interrupt 1.
Serial execution clock output for ICSP™.
Serial execution clock input for ICSP™.
LATA<2> data output.
PORTA<2> data input; Programmable weak pull-up.
ADC channel 2.
Comparator C1 output.
Timer0 external clock input.
External interrupt 2.
SR latch output.
PORTA<37> data input; Programmable weak pull-up.
Active-low Master Clear with internal pull-up.
High voltage programming input.
LATA<4> data output.
PORTA<4> data input; Programmable weak pull-up.
A/D input channel 3.
Main oscillator feedback output connection (XT, HS and LP modes).
System instruction cycle clock output.
LATA<5> data output.
PORTA<5> data input; Programmable weak pull-up.
Main oscillator input connection.
Main clock input connection.
Timer1 and Timer3 external clock input.
PIC18F1XK22/LF1XK22
Description
DS41365D-page 83
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