PIC16LF724-E/MV Microchip Technology, PIC16LF724-E/MV Datasheet - Page 154
![7 KB Flash, 16 MHz Int. Osc, NanoWatt XLP 40 UQFN 5x5x0.5mm TUBE](/photos/16/12/161286/qfn44_sml.jpg)
PIC16LF724-E/MV
Manufacturer Part Number
PIC16LF724-E/MV
Description
7 KB Flash, 16 MHz Int. Osc, NanoWatt XLP 40 UQFN 5x5x0.5mm TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheet
1.AC164112.pdf
(302 pages)
Specifications of PIC16LF724-E/MV
Processor Series
PIC16F
Core
PIC
Program Memory Type
Flash
Program Memory Size
7 KB
Data Ram Size
192 B
Interface Type
I2C, SPI, AUSART
Number Of Timers
3
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
UQFN-40
Development Tools By Supplier
MPLAB IDE Software
Minimum Operating Temperature
- 40 C
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
36
Eeprom Size
-
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 14x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Lead Free Status / Rohs Status
Details
- Current page: 154 of 302
- Download datasheet (5Mb)
PIC16F72X/PIC16LF72X
REGISTER 16-1:
DS41341E-page 154
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
R/W-0
CSRC
SREN/CREN overrides TXEN in Synchronous mode.
CSRC: Clock Source Select bit
Asynchronous mode:
Don’t care
Synchronous mode:
1 = Master mode (clock generated internally from BRG)
0 = Slave mode (clock from external source)
TX9: 9-bit Transmit Enable bit
1 = Selects 9-bit transmission
0 = Selects 8-bit transmission
TXEN: Transmit Enable bit
1 = Transmit enabled
0 = Transmit disabled
SYNC: AUSART Mode Select bit
1 = Synchronous mode
0 = Asynchronous mode
Unimplemented: Read as ‘0’
BRGH: High Baud Rate Select bit
Asynchronous mode:
1 = High speed
0 = Low speed
Synchronous mode:
Unused in this mode
TRMT: Transmit Shift Register Status bit
1 = TSR empty
0 = TSR full
TX9D: Ninth bit of Transmit Data
Can be address/data bit or a parity bit.
R/W-0
TX9
TXSTA: TRANSMIT STATUS AND CONTROL REGISTER
W = Writable bit
‘1’ = Bit is set
TXEN
R/W-0
(1)
(1)
R/W-0
SYNC
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
—
R/W-0
BRGH
© 2009 Microchip Technology Inc.
x = Bit is unknown
TRMT
R-1
R/W-0
TX9D
bit 0
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