PIC16LF1906-E/SS Microchip Technology, PIC16LF1906-E/SS Datasheet - Page 202
PIC16LF1906-E/SS
Manufacturer Part Number
PIC16LF1906-E/SS
Description
14KB Flash, 512B RAM, LCD, 11x10b ADC, EUSART, NanoWatt XLP 28 SSOP .209in TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheet
1.PIC16LF1904-EMV.pdf
(288 pages)
Specifications of PIC16LF1906-E/SS
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
LIN, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SSOP (0.209", 5.30mm Width)
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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PIC16LF1904/6/7
19.9
LCD waveforms are generated so that the net AC
voltage across the dark pixel should be maximized and
the net AC voltage across the clear pixel should be
minimized. The net DC voltage across any pixel should
be zero.
The COM signal represents the time slice for each
common, while the SEG contains the pixel data.
The pixel signal (COM-SEG) will have no DC
component and it can take only one of the two RMS
values. The higher RMS value will create a dark pixel
and a lower RMS value will create a clear pixel.
As the number of commons increases, the delta
between the two RMS values decreases. The delta
represents the maximum contrast that the display can
have.
FIGURE 19-8:
DS41569A-page 202
COM0
LCD Waveform Generation
TYPE-A/TYPE-B WAVEFORMS IN STATIC DRIVE
segment voltage
segment voltage
COM0-SEG0
COM0-SEG1
COM0 pin
SEG0 pin
SEG1 pin
(inactive)
(active)
Preliminary
The LCDs can be driven by two types of waveform:
Type-A and Type-B. In Type-A waveform, the phase
changes within each common type, whereas in Type-B
waveform, the phase changes on each frame
boundary. Thus, Type-A waveform maintains 0 V
over a single frame, whereas Type-B waveform takes
two frames.
Figure 19-8
for static, half-multiplex, 1/3-multiplex and 1/4-multiplex
drives for Type-A and Type-B waveforms.
Note 1: If Sleep has to be executed with LCD
1 Frame
2: When the LCD clock source is F
Sleep disabled (LCDCON<SLPEN> is
‘1’), then care must be taken to execute
Sleep only when V
‘0’.
if Sleep is executed, irrespective of the
LCDCON<SLPEN> setting, the LCD
immediately goes into Sleep. Thus, take
care to see that V
when Sleep is executed.
through
Figure 19-18
2011 Microchip Technology Inc.
DC
DC
on all the pixels is
on all pixels is ‘0’
provide waveforms
OSC
V
V
V
V
V
V
V
V
-V
V
/256,
1
0
1
0
1
0
1
0
0
1
DC
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