PIC16LF1906-E/MV Microchip Technology, PIC16LF1906-E/MV Datasheet - Page 227
PIC16LF1906-E/MV
Manufacturer Part Number
PIC16LF1906-E/MV
Description
14KB Flash, 512B RAM, LCD, 11x10b ADC, EUSART, NanoWatt XLP 28 UQFN 4x4x0.5mm TU
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheet
1.PIC16LF1904-EMV.pdf
(288 pages)
Specifications of PIC16LF1906-E/MV
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
LIN, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-UFQFN Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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21.2
ADDFSR
Syntax:
Operands:
Operation:
Status Affected:
Description:
ADDLW
Syntax:
Operands:
Operation:
Status Affected:
Description:
ADDWF
Syntax:
Operands:
Operation:
Status Affected:
Description:
ADDWFC
Syntax:
Operands:
Operation:
Status Affected:
Description:
2011 Microchip Technology Inc.
Instruction Descriptions
Add W and f
[ label ] ADDWF
0 f 127
d 0 , 1
(W) + (f) (destination)
C, DC, Z
Add the contents of the W register
with register ‘f’. If ‘d’ is ‘ 0 ’, the result is
stored in the W register. If ‘d’ is ‘ 1 ’, the
result is stored back in register ‘f’.
ADD W and CARRY bit to f
[ label ] ADDWFC
0 f 127
d [0,1]
(W) + (f) + (C) dest
C, DC, Z
Add W, the Carry flag and data mem-
ory location ‘f’. If ‘d’ is ‘ 0 ’, the result is
placed in W. If ‘d’ is ‘ 1 ’, the result is
placed in data memory location ‘f’.
[ label ] ADDFSR FSRn, k
-32 k 31
n [ 0, 1]
FSR(n) + k FSR(n)
None
the contents of the FSRnH:FSRnL
register pair.
FSRn is limited to the range 0000h -
FFFFh. Moving beyond these bounds
will cause the FSR to wrap-around.
[ label ] ADDLW
0 k 255
(W) + k (W)
C, DC, Z
The contents of the W register are
added to the eight-bit literal ‘k’ and the
result is placed in the W register.
Add Literal to FSRn
The signed 6-bit literal ‘k’ is added to
Add literal and W
f,d
k
f {,d}
Preliminary
ANDLW
Syntax:
Operands:
Operation:
Status Affected:
Description:
ANDWF
Syntax:
Operands:
Operation:
Status Affected:
Description:
ASRF
Syntax:
Operands:
Operation:
Status Affected:
Description:
PIC16LF1904/6/7
AND W with f
[ label ] ANDWF
0 f 127
d 0 , 1
(W) .AND. (f) (destination)
Z
AND the W register with register ‘f’. If
‘d’ is ‘ 0 ’, the result is stored in the W
register. If ‘d’ is ‘ 1 ’, the result is stored
back in register ‘f’.
AND literal with W
[ label ] ANDLW
0 k 255
(W) .AND. (k) (W)
Z
The contents of W register are
AND’ed with the eight-bit literal ‘k’.
The result is placed in the W register.
Arithmetic Right Shift
[ label ] ASRF
0 f 127
d [0,1]
(f<7>) dest<7>
(f<7:1>) dest<6:0>,
(f<0>) C,
C, Z
The contents of register ‘f’ are shifted
one bit to the right through the Carry
flag. The MSb remains unchanged. If
‘d’ is ‘ 0 ’, the result is placed in W. If ‘d’
is ‘ 1 ’, the result is stored back in reg-
ister ‘f’.
register f
f {,d}
DS41569A-page 227
f,d
k
C
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